| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Carolina Mora Lopez, Dimiter Prodanov, Dries Braeken, Ivan Gligorijevic, Wolfgang Eberle, Carmen Bartic, Robert Puers, Georges G. E. Gielen |
A Multichannel Integrated Circuit for Electrical Recording of Neural Activity, With Independent Channel Programmability.  |
IEEE Trans. Biomed. Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Adi Xhakoni, David San Segundo Bello, Georges G. E. Gielen |
Impact of TSV area on the dynamic range and frame rate performance of 3D-integrated image sensors. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Peng Gao, Xinpeng Xing, Jan Craninckx, Georges G. E. Gielen |
Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Elie Maricau, Dimilri De Jonghe, Georges G. E. Gielen |
Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Dimilri De Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos |
Advances in variation-aware modeling, verification, and testing of analog ICs. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Bo Liu, Jarir Messaoudi, Georges G. E. Gielen |
A fast analog circuit yield estimation method for medium and high dimensional problems. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen |
Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks. |
IEEE Trans. Evolutionary Computation |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Dixian Zhao, Patrick Reynaert, Georges G. E. Gielen |
Synthesis of Integrated Passive Components for High-Frequency RF ICs Based on Evolutionary Computation and Machine Learning Techniques. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen |
Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bart De Vuyst, Pieter Rombouts, Georges G. E. Gielen |
A Rigorous Approach to the Robust Design of Continuous-Time Sigma-Delta Modulators. |
IEEE Trans. on Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Athanasios Stefanou, Georges G. E. Gielen |
A Volterra Series Nonlinear Model of the Sampling Distortion in Flash ADCs Due to Substrate Noise Coupling. |
IEEE Trans. on Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Danneels, Kristof Coddens, Georges G. E. Gielen |
A fully-digital, 0.3V, 270 nW capacitive sensor interface without external references. |
ESSCIRC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Pieter De Wit, Georges G. E. Gielen |
A failure-resilient xDSL line driver with on-chip degradation monitor. |
ESSCIRC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
Transistor aging-induced degradation of analog circuits: Impact analysis and design guidelines. |
ESSCIRC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Elie Maricau, Peter H. N. De Wit |
Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Bo Liu, Ying He, Patrick Reynaert, Georges G. E. Gielen |
Global optimization of integrated transformers for high frequency microwave circuits using a Gaussian process based surrogate model. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
Stochastic circuit reliability analysis. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Carolina Mora Lopez, Silke Musa, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle |
Systematic design of a programmable low-noise CMOS neural interface for cell activity recording. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Murat Pak, Xuezhi Zheng, Georges G. E. Gielen |
A novel operating-point driven method for the sizing of analog IC. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Carolina Mora Lopez, Dries Braeken, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle |
A 16-channel low-noise programmable system for the recording of neural signals. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Wim Dehaene, Georges G. E. Gielen, Geert Deconinck, Johan Driesen, Marc Moonen, Bart Nauwelaers, C. Van Hoof, Patrick Wambacq |
Circuits and systems engineering education through interdisciplinary team-based design projects. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Simon Vanden Bussche, Pieter De Wit, Elie Maricau, Georges G. E. Gielen |
Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS. |
ICECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimitri de Jonghe, Georges G. E. Gielen |
Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheng Li, Georges G. E. Gielen |
Energy Normalized Correlation for Signal Acquisition in Power-Control-Absent UWB Networks. |
IEEE Communications Letters |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Nick Van Helleputte, Marian Verhelst, Wim Dehaene, Georges G. E. Gielen |
A Reconfigurable, 130 nm CMOS 108 pJ/pulse, Fully Integrated IR-UWB Receiver for Communication and Precise Ranging. |
J. Solid-State Circuits |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Soheil Radiom, Majid Baghaei Nejad, Karim Aghdam, Guy A. E. Vandenbosch, Li-Rong Zheng, Georges G. E. Gielen |
Far-Field On-Chip Antennas Monolithically Integrated in a Wireless-Powered 5.8-GHz Downlink/UWB Uplink RFID Tag in 0.18- μħbox m Standard CMOS. |
J. Solid-State Circuits |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
Efficient Variability-Aware NBTI and Hot Carrier Circuit Reliability Analysis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Bart De Vuyst, Pieter Rombouts, Jeroen De Maeyer, Georges G. E. Gielen |
The Nyquist Criterion: A Useful Tool for the Robust Design of Continuous-Time SigmaDelta Modulators. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Qingfu Zhang, Murat Pak, Suha Sipahi, Georges G. E. Gielen |
An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing. |
IEEE Congress on Evolutionary Computation |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen |
An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Wouter Volkaerts, Bart Marien, Hans Danneels, Valentijn De Smedt, Patrick Reynaert, Wim Dehaene, Georges G. E. Gielen |
A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Pieter De Wit, Georges G. E. Gielen |
Efficient simulation model for DAC dynamic properties. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Elie Maricau, Peter H. N. De Wit |
Design automation towards reliable analog integrated circuits. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheng Li, Wim Dehaene, Georges G. E. Gielen |
A 3-tier UWB-based indoor localization system for ultra-low-power sensor networks. |
IEEE Transactions on Wireless Communications |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen, R. Castro-López, Elisenda Roca |
A memetic approach to the automatic design of high-performance analog integrated circuits. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Analog circuit sizing, analog design automation, constrained optimization, memetic algorithm |
| 1 | Trent McConaghy, Georges G. E. Gielen |
Globally Reliable Variation-Aware Sizing of Analog Integrated Circuits via Response Surfaces and Structural Homotopy. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
Template-Free Symbolic Performance Modeling of Analog Circuits via Canonical-Form Functions and Genetic Programming. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen |
Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
ANTIGONE: Top-down creation of analog-to-digital converter architectures. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen |
Fuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions. |
IEEE Congress on Evolutionary Computation |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong |
Guess, solder, measure, repeat: how do I get my mixed-signal chip right? |
DAC |
2009 |
DBLP DOI BibTeX RDF |
Verilog-AMS, analog behavioral modeling, low power verification, mixed-signal verification, VHDL, SPICE, functional verification, Verilog, performance verification |
| 1 | Marian Verhelst, Nick Van Helleputte, Georges G. E. Gielen, Wim Dehaene |
A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging. |
ISSCC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Majid Baghaei Nejad, David S. Mendoza, Zhuo Zou, Soheil Radiom, Georges G. E. Gielen, Li-Rong Zheng, Hannu Tenhunen |
A remote-powered RFID tag with 10Mb/s UWB uplink and -18.5dBm sensitivity UHF downlink in 0.18µm CMOS. |
ISSCC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Wolfgang Eberle, Ashwin S. Mecheri, Thi Kim Thoa Nguyen, Georges G. E. Gielen, Raymond Campagnolo, Alison Burdett, Chris Toumazou, Bart Volckaerts |
Health-care electronics The market, the challenges, the progress. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen |
Massively multi-topology sizing of analog integrated circuits. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
Efficient reliability simulation of analog ICs including variability and time-varying stress. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yi Ke, Jan Craninckx, Georges G. E. Gielen |
A design methodology for fully reconfigurable Delta-Sigma data converters. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Athanasios Stefanou, Georges G. E. Gielen |
Prediction of Non-uniform Sampling Distortion Due to Substrate Noise Coupling in Regenerative Comparators. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Liu, Francisco V. Fernández, Dimilri De Jonghe, Georges G. E. Gielen |
Less expensive and high quality stopping criteria for MC-based analog IC yield optimization. |
ICECS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ivick Guerra-Gómez, Esteban Tlelo-Cuautle, Trent McConaghy, Georges G. E. Gielen |
Optimizing current conveyors by evolutionary algorithms including differential evolution. |
ICECS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen |
Design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS. |
DDECS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Elie Maricau, Georges G. E. Gielen |
A methodology for measuring transistor ageing effects towards accurate reliability simulation. |
IOLTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Minghu Jiang, Georges G. E. Gielen |
Analysis of quantization effects on high-order function neural networks. |
Appl. Intell. |
2008 |
DBLP DOI BibTeX RDF |
Weight clipping, High order function neural networks, Statistical model, Quantization |
| 1 | Elie Maricau, Peter H. N. De Wit, Georges G. E. Gielen |
An analytical model for hot carrier degradation in nanoscale CMOS suitable for the simulation of degradation in analog IC applications. |
Microelectronics Reliability |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi Ke, Jan Craninckx, Georges G. E. Gielen |
A Design Approach for Power-Optimized Fully Reconfigurable Delta Sigma A/D Converter for 4G Radios. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
Classification of analog synthesis tools based on their architecture selection mechanisms. |
Integration |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Peter H. N. De Wit, Elie Maricau, J. Loeckx, J. Martín-Martínez, Ben Kaczer, Guido Groeseneken, R. Rodríguez, M. Nafría |
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Binkley, Helmut E. Graeb, Georges G. E. Gielen, Jaijeet S. Roychowdhury |
From Transistor to PLL - Analogue Design and EDA Methods. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen |
A low-power mixing DAC IR-UWB-receiver. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Gao, Trent McConaghy, Georges G. E. Gielen |
ISCLEs: Importance Sampled Circuit Learning Ensembles for Trustworthy Analog Circuit Topology Synthesis. |
ICES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Gao, Trent McConaghy, Georges G. E. Gielen |
Importance sampled circuit learning ensembles for robust analog IC design. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
Automated extraction of expert knowledge in analog topology selection and sizing. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Donatella Sciuto |
Guest Editorial [intro. to the special issue on the 2006 IEEE/ACM Design, Automation and Test in Europe Conference]. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen |
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich |
Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Georges G. E. Gielen |
Future trends for wireless communication frontends in nanometer CMOS. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
RF frontends, wireless sensor networks, wireless communication, integrated circuits, reconfigurable hardware |
| 1 | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen |
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man |
Scalable Gate-Level Models for Power and Timing Analysis. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen (eds.) |
2007 International Conference on Computer-Aided Design (ICCAD'07), November 5-8, 2007, San Jose, CA, USA |
ICCAD |
2007 |
DBLP BibTeX RDF |
|
| 1 | Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man |
Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
Analyzing continuous-time Delta-Sigma-Modulators with generic behavioral models. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man |
SWAN: high-level simulation methodology for digital substrate noise generation. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
Canonical form functions as a simple means for genetic programming to evolve human-interpretable functions. |
GECCO |
2006 |
DBLP DOI BibTeX RDF |
genetic programming, grammar, grammatical evolution |
| 1 | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen |
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
hierarchical synthesis |
| 1 | Ewout Martens, Georges G. E. Gielen |
Generic Behavioral Modeling of Analog and Mixed-Signal Systems. |
FDL |
2006 |
DBLP BibTeX RDF |
|
| 1 | Georges G. E. Gielen (eds.) |
Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006 |
DATE |
2006 |
DBLP BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
Double-strength CAFFEINE: fast template-free symbolic modeling of analog circuits via implicit canonical form functions and explicit introns. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
Top-down heterogeneous synthesis of analog and mixed-signal systems. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen (eds.) |
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006 |
DATE Designers' Forum |
2006 |
DBLP BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
A behavioral model of sampled-data systems in the phase-frequency transfer domain for architectural exploration of transceivers. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alkis A. Hatzopoulos, Stefanos Stefanou, Georges G. E. Gielen, Dominique Schreurs |
Assessment of parameter extraction methods for integrated inductor design and model validation. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
Automation in mixed-signal design: challenges and solutions in the wake of the nano era. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
computer-aided design, analog, integrated circuits, mixed-signal |
| 1 | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man |
Digital ground bounce reduction by supply current shaping and clock frequency Modulation. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Didier Van Reeth, Georges G. E. Gielen |
A CAD Platform for Sensor Interfaces in Low-Power Applications. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert |
Performance space modeling for hierarchical synthesis of analog integrated circuits. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
hierarchical synthesis |
| 1 | Huiying Yang, Mukesh Ranjan, Wim Verhaegen, Mengmeng Ding, Ranga Vemuri, Georges G. E. Gielen |
Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich |
Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen |
Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen |
CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
Time-Domain Simulation of Sampled Weakly Nonlinear Systems Using Analytical Integration and Orthogonal Polynomial Series. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programming. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ewout Martens, Georges G. E. Gielen |
Behavioral modeling and simulation of weakly nonlinear sampled-data systems. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Trent McConaghy, Georges G. E. Gielen |
Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimization. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Georges G. E. Gielen, Kenneth Francken, Ewout Martens, Martin Vogels |
An analytical integration method for the simulation of continuous-time /spl Delta//spl Sigma/ modulators. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Minghu Jiang, Dafan Liu, Beixing Deng, Georges G. E. Gielen |
A Bayesian Classifier by Using the Adaptive Construct Algorithm of the RBF Networks. |
ISNN |
2004 |
DBLP DOI BibTeX RDF |
maximum-likelihood (ML), radial basis function (RBF), Gaussian mixture model (GMM), expectation-maximization (EM) |
| 1 | Minghu Jiang, Georges G. E. Gielen |
Backpropagation Analysis of the Limited Precision on High-Order Function Neural Networks. |
ISNN |
2004 |
DBLP DOI BibTeX RDF |
Weight Clipping, Backpropagation (BP), High Order Function Neural Networks (HOFNN), Quantization |
| 1 | Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovolný, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man |
High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
modeling, model order reduction, substrate noise |
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")