Search results for "Gert Jervan"

Found 15 publication records. Showing 15 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Mihkel Tagel, Peeter Ellervee, Thorsten Hollstein, Gert Jervan	Communication modelling and synthesis for NoC-based systems with real-time constraints.	DDECS	2011	DBLP DOI BibTeX RDF
1	Peeter Ellervee, Gert Jervan	Guest Editorial.	Microprocessors and Microsystems - Embedded Hardware Design	2010	DBLP DOI BibTeX RDF
1	Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar	Hybrid BIST optimization using reseeding and test set compaction.	Microprocessors and Microsystems - Embedded Hardware Design	2008	DBLP DOI BibTeX RDF
1	Raimund Ubar, Sergei Devadze, Maksim Jenihhin, Jaan Raik, Gert Jervan, Peeter Ellervee	Hierarchical Calculation of Malicious Faults for Evaluating the Fault-Tolerance.	DELTA	2008	DBLP DOI BibTeX RDF	high-level decision diagrams, fault tolerance, fault simulation
1	Gert Jervan, Elmet Orasson, Helena Kruus, Raimund Ubar	Hybrid BIST Optimization Using Reseeding and Test Set Compaction.	DSD	2007	DBLP DOI BibTeX RDF
1	Gert Jervan, Helena Kruus, Elmet Orasson, Raimund Ubar	Optimization of Memory-Constrained Hybrid BIST for Testing Core-Based Systems.	SIES	2007	DBLP DOI BibTeX RDF
1	Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin	Test Time Minimization for Hybrid BIST of Core-Based Systems.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	hybrid BIST, SoC, self-test
1	Gert Jervan, Anton Arhipov, Peeter Ellervee	Work in Progress: FPGA Based Emulation Environment.	ReCoSoC	2006	DBLP BibTeX RDF
1	Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles	Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment.	DSD	2005	DBLP DOI BibTeX RDF
1	Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles	Hybrid BIST Test Scheduling Based on Defect Probabilities.	Asian Test Symposium	2004	DBLP DOI BibTeX RDF
1	Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin	Test Time Minimization for Hybrid BIST of Core-Based Systems.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
1	Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, Maksim Jenihhin	Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture.	DFT	2003	DBLP DOI BibTeX RDF
1	Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus	A Hybrid BIST Architecture and Its Optimization for SoC Testing. (PDF / PS)	ISQED	2002	DBLP DOI BibTeX RDF
1	Elmet Orasson, Rein Raidma, Raimund Ubar, Gert Jervan, Zebo Peng	Fast Test Cost Calculation for Hybrid BIST in Digital Systems.	DSD	2001	DBLP DOI BibTeX RDF
1	Gert Jervan, Zebo Peng, Raimund Ubar	Test Cost Minimization for Hybrid Bist. (PDF / PS)	DFT	2000	DBLP DOI BibTeX RDF

Publications of "Gert Jervan" ( http://dblp.L3S.de/Authors/Gert_Jervan )