Search results for "Giorgos Dimitrakopoulos"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Haridimos T. Vergos, Giorgos Dimitrakopoulos	On Modulo 2^n+1 Adder Design.	IEEE Trans. Computers	2012	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Emmanouil Kalligeros	Dynamic-priority arbiter and multiplexer soft macros for on-chip networks switches.	DATE	2012	DBLP BibTeX RDF
1	Giorgos Dimitrakopoulos, Christoforos Kachris, Emmanouil Kalligeros	Scalable Arbiters and Multiplexers for On-FGPA Interconnection Networks.	FPL	2011	DBLP DOI BibTeX RDF
1	Nikos Chrysos, Giorgos Dimitrakopoulos	Practical High-Throughput Crossbar Scheduling.	IEEE Micro	2009	DBLP DOI BibTeX RDF
1	Yiouli Kritikou, Giorgos Dimitrakopoulos, E. Dimitrellou, Panagiotis Demestichas	A management scheme for improving transportation efficiency and contributing to the enhancement of the social fabric.	Telematics and Informatics	2009	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Costas Galanopoulos, Christos Mavrokefalidis, Dimitris Nikolos	Low-Power Leading-Zero Counting and Anticipation Logic for High-Speed Floating Point Units.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Nikos Chrysos, Costas Galanopoulos	Fast arbiters for on-chip network switches.	ICCD	2008	DBLP DOI BibTeX RDF
1	Nikos Chrysos, Giorgos Dimitrakopoulos	Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation.	Hot Interconnects	2008	DBLP DOI BibTeX RDF	VOQ crossbar scheduler, backlog-aware, deterministic service guarantees, round-robin arbiters, ASIC design
1	Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos	Sorter Based Permutation Units for Media-Enhanced Microprocessors.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos	An Energy-Delay Efficient Subword Permutation Unit.	ASAP	2006	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos	Fast bit permutation unit for media enhanced microprocessors.	ISCAS	2006	DBLP DOI BibTeX RDF
1	Costas Efstathiou, Haridimos T. Vergos, Giorgos Dimitrakopoulos, Dimitris Nikolos	Efficient Diminished-1 Modulo 2^n+1 Multipliers.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Modulo 2^n+1 multipliers, Fermat number transform, computer arithmetic, VLSI design, residue number system
1	Giorgos Dimitrakopoulos, Dimitris Nikolos	High-Speed Parallel-Prefix VLSI Ling Adders.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	parallel-prefix carry computation, computer arithmetic, VLSI design, Adders
1	Giorgos Dimitrakopoulos, Dimitris Nikolos	Closed-Form Bounds for Interconnect-Aware Minimum-Delay Gate Sizing.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, P. Kolovos, P. Kalogerakis, Dimitris Nikolos	Design of High-Speed Low-Power Parallel-Prefix VLSI Adders.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou	A Family of Parallel-Pre.x Modulo 2n - 1 Adders.	ASAP	2003	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Xrysovalantis Kavousianos, Dimitris Nikolos	Virtual-scan: a novel approach for software-based self-testing of microprocessors.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou	A systematic methodology for designing area-time efficient parallel-prefix modulo 2/sup n/ - 1 adders.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Giorgos Dimitrakopoulos, Dimitris Nikolos, Dimitris Bakalis	Bit-Serial Test Pattern Generation by an Accumulator Behaving as a Non-Linear Feedback Shift Register.	IOLTW	2002	DBLP DOI BibTeX RDF

Publications of "Giorgos Dimitrakopoulos" ( http://dblp.L3S.de/Authors/Giorgos_Dimitrakopoulos )