Search results for "Grigorios Magklis"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Fernando Latorre, Grigorios Magklis, José González, Pedro Chaparro, Antonio González	CROB: Implementing a Large Instruction Window through Compression.	T. HiPEAC	2011	DBLP DOI BibTeX RDF
1	Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González	Thread shuffling: combining DVFS and thread migration toreduce energy consumptions for multi-core systems.	ISLPED	2011	DBLP BibTeX RDF
1	Ryan Rakvic, Qiong Cai, José González, Grigorios Magklis, Pedro Chaparro, Antonio González	Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors.	TACO	2010	DBLP DOI BibTeX RDF
1	Ryan Rakvic, José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Antonio González	Energy efficiency via thread fusion and value reuse.	IET Computers & Digital Techniques	2010	DBLP DOI BibTeX RDF
1	Antonio González, Fernando Latorre, Grigorios Magklis	Processor Microarchitecture: An Implementation Perspective		2010	DOI RDF
1	Marc Lupon, Grigorios Magklis, Antonio González	A Dynamically Adaptable Hardware Transactional Memory.	MICRO	2010	DBLP DOI BibTeX RDF
1	Marc Lupon, Grigorios Magklis, Antonio González	FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery.	PACT	2009	DBLP DOI BibTeX RDF
1	José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Ryan Rakvic, Antonio González	Thread fusion.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Qiong Cai, José González, Ryan Rakvic, Grigorios Magklis, Pedro Chaparro, Antonio González	Meeting points: using thread criticality to adapt multicore hardware to parallel regions.	PACT	2008	DBLP DOI BibTeX RDF	critical threads, meeting point thread characterization, multi-threaded application, thread balancing, thread delaying, low-power, microarchitecture, energy-aware
1	Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González	Understanding the Thermal Implications of Multi-Core Architectures.	IEEE Trans. Parallel Distrib. Syst.	2007	DBLP DOI BibTeX RDF	Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management
1	Grigorios Magklis, Pedro Chaparro, José González, Antonio González	Independent front-end and back-end dynamic voltage scaling for a GALS microarchitecture.	ISLPED	2006	DBLP DOI BibTeX RDF	MCD, energy efficiency, DVS, microarchitecture, GALS
1	Pedro Chaparro, Grigorios Magklis, José González, Antonio González	Distributing the Frontend for Temperature Reduction.	HPCA	2005	DBLP DOI BibTeX RDF
1	YongKang Zhu, Grigorios Magklis, Michael L. Scott, Chen Ding, David H. Albonesi	The Energy Impact of Aggressive Loop Fusion.	IEEE PACT	2004	DBLP DOI BibTeX RDF
1	Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott, Steven G. Dropsho, Sandhya Dwarkadas	Hiding Synchronization Delays in a GALS Processor Microarchitecture.	ASYNC	2004	DBLP DOI BibTeX RDF
1	Steven G. Dropsho, Greg Semeraro, David H. Albonesi, Grigorios Magklis, Michael L. Scott	Dynamically Trading Frequency for Complexity in a GALS Microprocessor.	MICRO	2004	DBLP DOI BibTeX RDF
1	Grigorios Magklis, José González, Antonio González	Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay^2.	ICCD	2004	DBLP DOI BibTeX RDF
1	Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steve Dropsho, Sandhya Dwarkadas, Michael L. Scott	Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor.	IEEE Micro	2003	DBLP DOI BibTeX RDF
1	David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster	Dynamically Tuning Processor Resources with Adaptive Processing.	IEEE Computer	2003	DBLP DOI BibTeX RDF
1	Grigorios Magklis, Michael L. Scott, Greg Semeraro, David H. Albonesi, Steve Dropsho	Profile-Based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor. (PDF / PS)	ISCA	2003	DBLP DOI BibTeX RDF
1	Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg Semeraro, Grigorios Magklis, Michael L. Scott	Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power.	IEEE PACT	2002	DBLP DOI BibTeX RDF
1	Greg Semeraro, David H. Albonesi, Steve Dropsho, Grigorios Magklis, Sandhya Dwarkadas, Michael L. Scott	Dynamic frequency and voltage control for a multiple clock domain microarchitecture.	MICRO	2002	DBLP DOI BibTeX RDF
1	Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Michael L. Scott	Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling.	HPCA	2002	DBLP DOI BibTeX RDF	Off-Line Analysis Tool, Dynamic Reconfiguration Algorithm, Low Power, Dynamic Voltage and Frequency Scaling, Multiple Clock Domain
1	Sotiris Ioannidis, Athanasios E. Papathanasiou, Grigorios Magklis, Evangelos P. Markatos, Dionisios N. Pnevmatikatos, J. Sevaslidou	On Using Reliable Network RAM in Networks of Workstations.	Scalable Computing: Practice and Experience	1999	DBLP BibTeX RDF
1	Dionisios N. Pnevmatikatos, Evangelos P. Markatos, Grigorios Magklis, Sotiris Ioannidis	On using network RAM as a non-volatile buffer.	Cluster Computing	1999	DBLP DOI BibTeX RDF

Publications of "Grigorios Magklis" ( http://dblp.L3S.de/Authors/Grigorios_Magklis )