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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 6 keywords
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Results
Found 37 publication records. Showing 37 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Kihoon Lee, Han-Gil Kang, Jeong-In Park, Hanho Lee |
A High-Speed Low-Complexity Concatenated BCH Decoder Architecture for 100 Gb/s Optical Communications.  |
Signal Processing Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong-Kyu Kim, Chang-Seok Choi, Hanho Lee |
Low Complexity Filter Architecture for ATSC Terrestrial Broadcasting DTV Systems. |
IEICE Transactions |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chang-Seok Choi, Hyo-Jin Ahn, Hanho Lee |
High-Throughput Low-Complexity Four-Parallel Reed-Solomon Decoder Architecture for High-Rate WPAN Systems. |
IEICE Transactions |
2011 |
DBLP BibTeX RDF |
|
| 1 | Kisun Jung, Hanho Lee |
Low-Complexity Multi-Mode Memory-Based FFT Processor for DVB-T2 Applications. |
IEICE Transactions |
2011 |
DBLP BibTeX RDF |
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| 1 | Sangmin Kim, Gerald E. Sobelman, Hanho Lee |
A Reduced-Complexity Architecture for LDPC Layered Decoding Schemes. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung-Il Baek, Hanho Lee, Chang-Seok Choi, Sangmin Kim, Gerald E. Sobelman |
A high-throughput LDPC decoder architecture for high-rate WPAN systems. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Taesang Cho, Hanho Lee, Jounsup Park, Chulgyun Park |
A high-speed low-complexity modified radix-25 FFT processor for gigabit WPAN applications. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Jeong-In Park, Hanho Lee, Seongsoo Lee |
An area-efficient truncated inversionless Berlekamp-Massey architecture for Reed-Solomon decoders. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Sangho Yoon, Hanho Lee, Kihoon Lee |
High-Speed Two-Parallel Concatenated BCH-Based Super-FEC Architecture for Optical Communications. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
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| 1 | Sangho Yoon, Hanho Lee, Kihoon Lee, Chang-Seok Choi, Jongyoon Shin, Jongho Kim, Je-Soo Ko |
Two-parallel concatenated BCH super-FEC architecture for 100-GB/S optical communications. |
SiPS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jeesung Lee, Hanho Lee |
A High-Speed Two-Parallel Radix-24 FFT/IFFT Processor for MB-OFDM UWB Systems. |
IEICE Transactions |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Seungbeom Lee, Hanho Lee |
A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders. |
IEICE Transactions |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Sangmin Kim, Gerald E. Sobelman, Hanho Lee |
Adaptive quantization in min-sum based irregular LDPC decoder. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Yong-Je Goo, Hanho Lee |
Two bit-level pipelined viterbi decoder for high-performance UWB applications. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Minhyeok Shin, Hanho Lee |
A high-speed four-parallel radix-24 FFT/IFFT processor for UWB applications. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Sangho Yoon, Hanho Lee |
A Discrepancy-Computationless RiBM algorithm and its architecture for BCH decoders. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Chang-Seok Choi, Hanho Lee |
A Self-Reconfigurable Adaptive FIR Filter System on Partial Reconfiguration Platform. |
IEICE Transactions |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Cheol-Ho Shin, Sangsung Choi, Hanho Lee, Jeong-Ki Pack |
A Design and Performance of 4-Parallel MB-OFDM UWB Receiver. |
IEICE Transactions |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Chang-Seok Choi, Hanho Lee |
A Partial Self-Reconfigurable Adaptive FIR Filter System. |
SiPS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Seungbeom Lee, Hanho Lee, Jongyoon Shin, Je-Soo Ko |
A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Yong-Min Lee, Chang-Seok Choi, Seung-Gon Hwang, Hyun Dong Kim, Chul Hong Min, Jae-Hyun Park, Hanho Lee, Tae-Seon Kim, Chong Ho Lee |
Ubiquitous Evolvable Hardware System for Heart Disease Diagnosis Applications. |
ARC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee, Chang-Seok Choi |
Implementation of a FIR Filter on a Partial Reconfigurable Platform. |
KES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yeong-Jae Oh, Hanho Lee, Chong Ho Lee |
A reconfigurable FIR filter design using dynamic partial reconfiguration. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeesung Lee, Hanho Lee, Sang-in Cho, Sangsung Choi |
A high-speed, low-complexity radix-24 FFT processor for MB-OFDM UWB systems. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yeong-Jae Oh, Hanho Lee, Chong Ho Lee |
Dynamic Partial Reconfigurable FIR Filter Design. |
ARC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee |
Power-Aware Scalable Pipelined Booth Multiplier. |
IEICE Transactions |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | In Ja Jeon, Phill-Kyu Rhee, Hanho Lee |
An Evolvable Hardware System Under Uneven Environment. |
KES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee |
Reconfigurable Power-Aware Scalable Booth Multiplier. |
KES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee |
An ultra high-speed Reed-Solomon decoder. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee, Gerald E. Sobelman |
VLSI Design Of Digit-Serial FPGA Architecture. |
Journal of Circuits, Systems, and Computers |
2004 |
DBLP DOI BibTeX RDF |
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| 1 | Hanho Lee |
High-speed VLSI architecture for parallel Reed-Solomon decoder. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee |
An Area-Efficient Euclidean Algorithm Block for Reed-Solomon Decoder. |
ISVLSI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee |
High-speed VLSI architecture for parallel Reed-Solomon decoder. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman |
A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor. |
FCCM |
1999 |
DBLP DOI BibTeX RDF |
FPGA, Elliptic curve cryptography, Reconfigurable hardware, Scalar multiplication, Galois field, Coprocessor |
| 1 | Hanho Lee, Gerald E. Sobelman |
Digit-Serial DSP Library for Optimized FPGA Configuration. |
FCCM |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee, Sarvesh Shrivastava, Gerald E. Sobelman |
FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract). |
FPGA |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanho Lee, Gerald E. Sobelman |
A New Low-Voltage Full Adder Circuit. |
Great Lakes Symposium on VLSI |
1997 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #37 of 37 (100 per page; Change: )
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