|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2 occurrences of 2 keywords
|
|
|
|
|
Results
Found 9 publication records. Showing 9 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Kiyoshi Nagata, Fidel R. Nemenzo, Hideo Wada |
The number of self-dual codes over Zp3{Z_{p^3}}.  |
Des. Codes Cryptography  |
2009 |
DBLP DOI BibTeX RDF |
Mathematics Subject Classification (2000) 94B05 |
| 1 | Kiyoshi Nagata, Fidel R. Nemenzo, Hideo Wada |
On Self-dual Codes over Z16.  |
AAECC  |
2009 |
DBLP DOI BibTeX RDF |
Doubly even codes, Mass formula, Self-dual codes, Finite rings |
| 1 | Yoshiko Yasuda, Hiroaki Fujii, Hideya Akashi, Yasuhiro Inagami, Teruo Tanaka, Junji Nakagoshi, Hideo Wada, Tsutomu Sumimoto |
Deadlock-Free Fault-tolerant Routing in the Multi-dimensional Crossbar Network and Its Implementation for the Hitachi SR2201. (PDF / PS)  |
IPPS  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroaki Fujii, Yoshiko Yasuda, Hideya Akashi, Yasuhiro Inagami, Makoto Koga, Osamu Ishihara, Masamori Kashiyama, Hideo Wada, Tsutomu Sumimoto |
Architecture and Performance of the Hitachi SR2201 Massively Parallel Processor System. (PDF / PS)  |
IPPS  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroshi Nakamura, Taisuke Boku, Hideo Wada, Hiromitsu Imori, Ikuo Nakata, Yasuhiro Inagami, Kisaburo Nakazawa, Yoshiyuki Yamashita |
A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers.  |
International Conference on Supercomputing  |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | Michihiro Hirai, Shun Kawabe, Hideo Wada |
An Overview of the HITACHI S-820 Supercomputer System.  |
Supercomputer  |
1989 |
DBLP BibTeX RDF |
|
| 1 | Hideo Wada, Tadaaki Isobe, Masao Furukawa, Shun Kawabe |
High-speed storage control schemes of HITACHI supercomputer S-820 system.  |
ICS  |
1989 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideo Wada, Koichi Ishii, Shigeko Yazawa, Shun Kawabe |
High-Speed Vector Instruction Execution Schemes of HITACHI Supercomputer S-820 System.  |
ICPP  |
1988 |
DBLP BibTeX RDF |
|
| 1 | Hideo Wada, K. Ishil, Masakazu Fukagawa, H. Murayama, Shun Kawabe |
High-speed processing schemes for summation type and iteration type vector instructions on Hitachi supercomputer S-820 system.  |
ICS  |
1988 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #9 of 9 (100 per page; Change: )
|
|