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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 43 occurrences of 38 keywords
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Results
Found 56 publication records. Showing 56 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs.  |
IEICE Transactions  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama |
Clock-constrained simultaneous allocation and binding for multiplexer optimization in high-level synthesis.  |
ASP-DAC  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada |
Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems.  |
IEICE Transactions  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama, Hiroaki Takada |
An integrated optimization framework for reducing the energy consumption of embedded real-time applications.  |
ISLPED  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor |
An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating.  |
DSD  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada |
Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs.  |
ReConFig  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada |
Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design.  |
IEICE Transactions  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada |
Static Task Scheduling Algorithms Based on Greedy Heuristics for Battery-Powered DVS Systems.  |
IEICE Transactions  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism.  |
IEICE Transactions  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
A Novel Mechanism for Effective Hardware Task Preemption in Dynamically Reconfigurable Systems.  |
FPL  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis.  |
DELTA  |
2010 |
DBLP DOI BibTeX RDF |
static single assignment transformation, high-level synthesis, multiplexer |
| 1 | Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada |
Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems.  |
CASES  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada |
Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems.  |
DATE  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada |
Automatic communication synthesis with hardware sharing for design space exploration.  |
ISCAS  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada |
Effective Scheduling Algorithms for I/O Blocking with a Multi-Frame Task Model.  |
IEICE Transactions  |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis.  |
JIP  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada |
Analyzing and optimizing energy efficiency of algorithms on DVS systems a first step towards algorithmic energy minimization.  |
ASP-DAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Zeng, Tetsuo Yokoyama, Hiroyuki Tomiyama, Hiroaki Takada |
Practical Energy-Aware Scheduling for Real-Time Multiprocessor Systems.  |
RTCSA  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tetsuo Yokoyama, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada |
Heuristics for Static Voltage Scheduling Algorithms on Battery-Powered DVS Systems.  |
ICESS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Masanari Nishimura, Nagisa Ishiura, Yoshiyuki Ishimori, Hiroyuki Kanbara, Hiroyuki Tomiyama |
High-Level Synthesis of Software Function Calls.  |
IEICE Transactions  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada |
An Effective GA-Based Scheduling Algorithm for FlexRay Systems.  |
IEICE Transactions  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Junpei Zushi, Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Koji Inoue |
Improved Policies for Drowsy Caches in Embedded Processors.  |
DELTA  |
2008 |
DBLP DOI BibTeX RDF |
Low Power Cache Design, Leakage Energy, Drowsy Cache |
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii |
CHStone: A benchmark program suite for practical C-based high-level synthesis.  |
ISCAS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada, Tohru Ishihara |
A Generalized Framework for System-Wide Energy Savings in Hard Real-Time Embedded Systems.  |
EUC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hideki Takase, Hiroyuki Tomiyama, Gang Zeng, Hiroaki Takada |
Energy Efficiency of Scratch-Pad Memory at 65 nm and Below: An Empirical Study.  |
ICESS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Function Call Optimization for Efficient Behavioral Synthesis.  |
IEICE Transactions  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii |
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis.  |
IEICE Transactions  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii |
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis.  |
ACM Great Lakes Symposium on VLSI  |
2007 |
DBLP DOI BibTeX RDF |
function calls, integer programming problem, behavioral synthesis |
| 1 | Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada |
RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip.  |
ASP-DAC  |
2007 |
DBLP DOI BibTeX RDF |
codesign toolkit, embedded multiprocessor systems, system-level design toolkit, real-time operating systems, RTOS, multiprocessor systems-on-chip |
| 1 | Shan Ding, Hiroyuki Tomiyama, Hiroaki Takada |
Scheduling Algorithms for I/O Blockings with a Multi-frame Task Model.  |
RTCSA  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada |
Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services.  |
IESS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada |
A Software Framework for Energy and Performance Tradeoff in Fixed-Priority Hard Real-Time Embedded Systems.  |
EUC  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Takashi Furukawa, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada |
A Hardware/Software Cosimulator with RTOS Supports for Multiprocessor Embedded Systems.  |
ICESS ![In: Embedded Software and Systems, [Third] International Conference, ICESS 2007, Daegu, Korea, May 14-16, 2007, Proceedings, pp. 283-294, 2007, Springer, 978-3-540-72684-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
ITRON, Embedded Systems, Multiprocessors, RTOS, Cosimulation |
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii |
Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study.  |
ICESS ![In: Embedded Software and Systems, [Third] International Conference, ICESS 2007, Daegu, Korea, May 14-16, 2007, Proceedings, pp. 261-270, 2007, Springer, 978-3-540-72684-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada |
Function Call Optimization in Behavioral Synthesis.  |
DSD  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Shin-ichiro Chikada, Shinya Honda, Hiroaki Takada |
An RTOS-Based Design and Validation Methodology for Embedded Systems.  |
IEICE Transactions  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Shan Ding, Naohiko Murakami, Hiroyuki Tomiyama, Hiroaki Takada |
A GA-based scheduling method for FlexRay systems.  |
EMSOFT  |
2005 |
DBLP DOI BibTeX RDF |
genetic algorithm, distributed embedded systems, FlexRay |
| 1 | Hiroshi Miyamoto, Shinichi Iiyama, Hiroyuki Tomiyama, Hiroaki Takada, Hiroshi Nakashima |
An Efficient Search Algorithm of Worst-Case Cache Flush Timings.  |
RTCSA  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Nikil Dutt |
ILP-Based Program Path Analysis for Bounding Worst-Case Inter-Task Cache Conflicts.  |
IEICE Transactions  |
2004 |
DBLP BibTeX RDF |
|
| 1 | Shinya Honda, Takayuki Wakabayashi, Hiroyuki Tomiyama, Hiroaki Takada |
RTOS-centric hardware/software cosimulator for embedded system design.  |
CODES+ISSS  |
2004 |
DBLP DOI BibTeX RDF |
embedded Systems, RTOS, cosimulation |
| 1 | Prabhat Mishra, Nikil Dutt, Hiroyuki Tomiyama |
Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications.  |
Design Autom. for Emb. Sys.  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Hiroaki Takada, Nikil D. Dutt |
Data Organization Exploration for Low-Energy Address Buses.  |
ESTImedia  |
2003 |
DBLP BibTeX RDF |
|
| 1 | Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma, Yun Cao |
Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems.  |
ISSS  |
2002 |
DBLP DOI BibTeX RDF |
WTLS, security, performance, mobile computing, embedded system, wireless communications, encryption, AES, RSA, design methodology, system architecture, platform, DES, IPSec, SSL, decryption, handset, 3DES, security processing |
| 1 | Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau |
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language.  |
VLSI Design  |
2002 |
DBLP DOI BibTeX RDF |
Pipeline Verification, Architecture Description Language |
| 1 | Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama |
Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units.  |
DATE  |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama, Ashok Halambi |
New directions in compiler technology for embedded systems (embedded tutorial).  |
ASP-DAC  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Anupam Datta, Sidharth Choudhury, Anupam Basu, Hiroyuki Tomiyama, Nikil Dutt |
Satisfying Timing Constraints of Preemptive Real-Time Tasks through Task Layout Technique.  |
VLSI Design  |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Nikil D. Dutt |
Program path analysis to bound cache-related preemption delay in preemptive real-time systems.  |
CODES  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroto Yasuura, Hiroyuki Tomiyama, Akihiko Inoue, Eko Fajar |
Embedded System Design Using Soft-Core Processor and Valen-C.  |
J. Inf. Sci. Eng.  |
1998 |
DBLP BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Hiroto Yasuura |
Module Selection Using Manufacturing Information.  |
ASP-DAC  |
1998 |
DBLP BibTeX RDF |
|
| 1 | Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, Eko Fajar, Hiroto Yasuura |
Instruction Encoding Techniques for Area Minimization of Instruction ROM. (PDF / PS)  |
ISSS  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Akihiko Inoue, Hiroto Yasuura |
Statistical Performance-Driven Module Binding in High-Level Synthesis. (PDF / PS)  |
ISSS  |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura |
Instruction Scheduling for Power Reduction in Processor-Based System Design.  |
DATE  |
1998 |
DBLP DOI BibTeX RDF |
Caches, Low-Power Design, Instruction Scheduling |
| 1 | Hiroyuki Tomiyama, Hiroto Yasuura |
Code placement techniques for cache miss rate reduction.  |
ACM Trans. Design Autom. Electr. Syst.  |
1997 |
DBLP DOI BibTeX RDF |
integer linear programming, instruction cache, code placement |
| 1 | Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura |
Memory-CPU Size Optimization for Embedded System Designs.  |
DAC  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Hiroto Yasuura |
Size-Constrained Code Placement for Cache Miss Rate Reduction. (PDF / PS)  |
ISSS  |
1996 |
DBLP DOI BibTeX RDF |
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