Search results for "HoL-blocking"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Teresa Nachiondo Frinós, Jose Flich, José Duato	Destination-Based HoL Blocking Elimination.	ICPADS	2006	DBLP DOI BibTeX RDF
2	Teresa Nachiondo Frinós, Jose Flich, José Duato	Efficient Reduction of HOL Blocking in Multistage Networks.	IPDPS	2005	DBLP DOI BibTeX RDF
2	Deng Pan, Yuanyuan Yang	FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	virtual output queued (VOQ) switch, head of line (HOL) blocking, scheduling, Multicast, crossbar switch, multicast switch
2	José Duato, Jose Flich, Teresa Nachiondo Frinós	A Cost-Effective Technique to Reduce HOL Blocking in Single-Stage and Multistage Switch Fabrics.	PDP	2004	DBLP DOI BibTeX RDF
2	María Engracia Gómez, Jose Flich, Antonio Robles, Pedro López, José Duato	VOQSW: A Methodology to Reduce HOL Blocking in InfiniBand Networks.	IPDPS	2003	DBLP DOI BibTeX RDF	InfiniBand network, virtual lanes, irregular topologies, head-of-line blocking
1	Jesús Escudero-Sahuquillo, Ernst Gunnar Gran, Pedro Javier García, Jose Flich, Tor Skeie, Olav Lysne, Francisco J. Quiles, José Duato	Combining Congested-Flow Isolation and Injection Throttling in HPC Interconnection Networks.	ICPP	2011	DBLP DOI BibTeX RDF	HoL-blocking, Interconnection Networks, Congestion Management
1	Teresa Nachiondo Frinós, Jose Flich, José Duato	Buffer Management Strategies to Reduce HoL Blocking.	IEEE Trans. Parallel Distrib. Syst.	2010	DBLP DOI BibTeX RDF	distributed systems, network operating systems, computer systems organization, network architecture and design, Communication/networking and information technology
1	Alejandro Martínez, Pedro Javier García, Francisco José Alfaro, José L. Sánchez, Jose Flich, Francisco J. Quiles, José Duato	A Switch Architecture Guaranteeing QoS Provision and HOL Blocking Elimination.	IEEE Trans. Parallel Distrib. Syst.	2009	DBLP DOI BibTeX RDF
1	Chan-Soo Hwang, John M. Cioffi	Opportunistic CSMA/CA for achieving multi-user diversity in wireless LAN.	IEEE Transactions on Wireless Communications	2009	DBLP DOI BibTeX RDF
1	Pan Li, Hongqiang Zhai, Yuguang Fang	SDMAC: Selectively Directional MAC protocol for wireless mobile ad hoc networks.	Wireless Networks	2009	DBLP DOI BibTeX RDF	MAC protocol, Directional antennas, Wireless mobile ad hoc networks
1	Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles, Jose Flich, José Duato	FBICM: Efficient Congestion Management for High-Performance Networks Using Distributed Deterministic Routing.	HiPC	2008	DBLP DOI BibTeX RDF	Congestion Control, Distributed Routing, High-Performance Interconnects
1	Toshihiro Shikama, Takashi Watanabe, Tadanori Mizuno	A Multilink Protocol with the Per Flow Resequencing and Its Performance Evaluation.	ICC	2007	DBLP DOI BibTeX RDF
1	Gaspar Mora, Pedro Javier García, Jose Flich, José Duato	RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management.	ICPP	2007	DBLP DOI BibTeX RDF
1	Joan-Lluís Ferrer, Elvira Baydal, Antonio Robles, Pedro López, José Duato	Congestion Management in MINs through Marked and Validated Packets.	PDP	2007	DBLP DOI BibTeX RDF
1	Gaspar Mora, Jose Flich, José Duato, Pedro López, Elvira Baydal, Olav Lysne	Towards an efficient switch architecture for high-radix switches.	ANCS	2006	DBLP DOI BibTeX RDF	arbiter efficiency, partitioned crossbar, switch organization
1	Oladayo Salami, H. Anthony Chan	The pursuit of efficient IP resource management has been.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF
1	Deng Pan, Yuanyuan Yang	Hardware Efficient Two Step Iterative Matching Algorithms for VOQ Switches.	ICPADS	2006	DBLP DOI BibTeX RDF
1	Pedro Javier García, Francisco J. Quiles, Jose Flich, José Duato, Ian Johnson, Finbar Naven	RECN-DD: A Memory-Efficient Congestion Management Technique for Advanced Switching.	ICPP	2006	DBLP DOI BibTeX RDF
1	José Duato, Ian Johnson, Jose Flich, Finbar Naven, Pedro Javier García, Teresa Nachiondo Frinós	A New Scalable and Cost-Effective Congestion Management Strategy for Lossless Multistage Interconnection Networks.	HPCA	2005	DBLP DOI BibTeX RDF
1	Teresa Nachiondo Frinós, Jose Flich, José Duato, Mitchell Gusat	Cost / Performance Trade-Offs and Fairness Evaluation of Queue Mapping Policies.	Euro-Par	2005	DBLP DOI BibTeX RDF
1	Pedro Javier García, Jose Flich, José Duato, Francisco J. Quiles, Ian Johnson, Finbar Naven	On the Correct Sizing on Meshes Through an Effective Congestion Management Strategy.	Euro-Par	2005	DBLP DOI BibTeX RDF
1	Deng Pan, Yuanyuan Yang	FIFO Based Multicast Scheduling Algorithm for VOQ Packet Switches.	ICPP	2004	DBLP DOI BibTeX RDF
1	José Miguel-Alonso, José A. Gregorio, Valentin Puente, Fernando Vallejo, Ramón Beivide	Load Unbalance in k-ary n-Cube Networks.	Euro-Par	2004	DBLP DOI BibTeX RDF
1	Hakyong Kim, Kiseon Kim	Performance analysis of the multiple input-queued packet switch with the restricted rule.	IEEE/ACM Trans. Netw.	2003	DBLP DOI BibTeX RDF	Multiple input queueing (MIQ), free rule, restricted rule
1	Francisco J. González-Castaño, Cristina López-Bravo, Rafael Asorey-Cacheda	Analysis of Parallel Hierarchical Matching Schedulers for Input-Queued Switches under Different Traffic Conditions.	ISCC	2003	DBLP DOI BibTeX RDF
1	Ali Mohammad Zareh Bidoki, Nasser Yazdani, Sayed Vahid Azhari, Siavash Samadian-Barzoki	A High Speed ATM/IP Switch Fabric Using Distributed Scheduler.	ICOIN	2003	DBLP DOI BibTeX RDF
1	Sang-Ho Lee, Dong Ryeol Shin	A Simple Pipelined Scheduling for Input-Queued Switches.	ISCIS	2003	DBLP DOI BibTeX RDF
1	Andrea Francini, Fabio M. Chiussi	Integrated Provision of QoS Guarantees to Unicast and Multicast Traffic in Packet Switches.	IWDC	2001	DBLP DOI BibTeX RDF
1	Ge Nong, Jogesh K. Muppala, Mounir Hamdi	A Performance Model for ATM Switches with Multiple Input Queues.	ICCCN	1997	DBLP DOI BibTeX RDF	performance evaluation, analytical modeling, computer simulation, ATM switch
1	Michael Jurczyk	Performance and Implementation Aspects of Higher Order Head-of-Line Blocking Switch Boxes. (PDF / PS)	ICPP	1997	DBLP DOI BibTeX RDF	central memory buffering, higher order blocking effects, multistage cube network, nonuniform traffic patterns, switch box implementation
1	Pravin Bhagwat, Partha P. Bhattacharya, Arvind Krishna, Satish K. Tripathi	Using channel state dependent packet scheduling to improve TCPthroughput over wireless LANs.	Wireless Networks	1997	DBLP DOI BibTeX RDF
1	Derek C. W. Pao, W. N. Chau	Design of ATM switch using hypercube with distributed shared input buffers and dedicated output buffers.	ICNP	1995	DBLP DOI BibTeX RDF