Search results for "Hsien-Hsin S. Lee"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim	3D-MAPS: 3D Massively parallel processor with stacked memory.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee	Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out.	IEEE Micro	2011	DBLP DOI BibTeX RDF
1	Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim	Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation.	ACM Trans. Design Autom. Electr. Syst.	2011	DBLP DOI BibTeX RDF
1	Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim	Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Jen-Cheng Huang, Matteo Monchiero, Yoshio Turner, Hsien-Hsin S. Lee	Ally: OS-Transparent Packet Inspection Using Sequestered Cores.	ANCS	2011	DBLP DOI BibTeX RDF
1	Mrinmoy Ghosh, Ripal Nathuji, Min Lee, Karsten Schwan, Hsien-Hsin S. Lee	Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature.	ICPP	2011	DBLP DOI BibTeX RDF
1	Dean L. Lewis, Shreepad Panth, Xin Zhao, Sung Kyu Lim, Hsien-Hsin S. Lee	Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores.	ICCD	2011	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Hsien-Hsin S. Lee	Chameleon: Virtualizing idle acceleration cores of a heterogeneous multicore processor for caching and prefetching.	TACO	2010	DBLP DOI BibTeX RDF
1	Jun Yang 0002, Lan Gao, Youtao Zhang, Marek Chrobak, Hsien-Hsin S. Lee	A low-cost memory remapping scheme for address bus protection.	J. Parallel Distrib. Comput.	2010	DBLP DOI BibTeX RDF
1	Sung Woo Chung, Hsien-Hsin S. Lee, Woo Hyong Lee	Architecture/OS Support for Embedded Multi-core Systems.	Comput. J.	2010	DBLP DOI BibTeX RDF
1	Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee	Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping.	ISCA	2010	DBLP DOI BibTeX RDF	dynamic address remapping, security, phase change memory, wear leveling
1	Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammed M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim	Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory.	CICC	2010	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Hsien-Hsin S. Lee	COMPASS: a programmable data prefetcher using idle GPU shaders.	ASPLOS	2010	DBLP DOI BibTeX RDF	compute shader, GPU, prefetch
1	Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee	SAFER: Stuck-At-Fault Error Recovery for Memories.	MICRO	2010	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Nak Hee Seong, Dean L. Lewis, Hsien-Hsin S. Lee	An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth.	HPCA	2010	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Hsien-Hsin S. Lee	PROPHET: goal-oriented provisioning for highly tunable multicore processors in cloud computing.	Operating Systems Review	2009	DBLP DOI BibTeX RDF
1	Hsien-Hsin S. Lee, Krishnendu Chakrabarty	Test Challenges for 3D Integrated Circuits.	IEEE Design & Test of Computers	2009	DBLP DOI BibTeX RDF
1	Dean L. Lewis, Hsien-Hsin S. Lee	Testing Circuit-Partitioned 3D IC Designs.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Dean L. Lewis, Sudhakar Yalamanchili, Hsien-Hsin S. Lee	High Performance Non-blocking Switch Design in 3D Die-Stacking Technology.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Mrinmoy Ghosh, Emre Özer, Simon Ford, Stuart Biles, Hsien-Hsin S. Lee	Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.	ISLPED	2009	DBLP DOI BibTeX RDF	low power, bloom filter
1	Michael B. Healy, Hsien-Hsin S. Lee, Gabriel H. Loh, Sung Kyu Lim	Thermal optimization in multi-granularity multi-core floorplanning.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Dean L. Lewis, Hsien-Hsin S. Lee	Architectural evaluation of 3D stacked RRAM caches.	3DIC	2009	DBLP DOI BibTeX RDF
1	Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim	Pre-bond testable low-power clock tree design for 3D stacked ICs.	ICCAD	2009	DBLP BibTeX RDF
1	Dong Hyuk Woo, Hsien-Hsin S. Lee, Joshua B. Fryman, Allan D. Knies, Marsha Eng	POD: A 3D-Integrated Broad-Purpose Acceleration Layer.	IEEE Micro	2008	DBLP DOI BibTeX RDF
1	Fayez Mohamood, Mrinmoy Ghosh, Hsien-Hsin S. Lee	DLL-conscious instruction fetch optimization for SMT processors.	Journal of Systems Architecture - Embedded Systems Design	2008	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Hsien-Hsin S. Lee	Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era.	IEEE Computer	2008	DBLP DOI BibTeX RDF
1	Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee	Improving TLB energy for java applications on JVM.	ICSAMOS	2008	DBLP DOI BibTeX RDF
1	Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-Hsin S. Lee	Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors.	ASPLOS	2008	DBLP DOI BibTeX RDF	MESI protocol, internal and external snoops, self-modifying code, chip multiprocessors
1	Vikas R. Vasisht, Hsien-Hsin S. Lee	SHARK: Architectural support for autonomic protection against stealth by rootkit exploits.	MICRO	2008	DBLP DOI BibTeX RDF
1	Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Lee, Sung Kyu Lim	A unified methodology for power supply noise reduction in modern microarchitecture design.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Ahmad Sharif, Hsien-Hsin S. Lee	Total Recall: A Debugging Framework for GPUs.	Graphics Hardware	2008	DBLP DOI BibTeX RDF
1	Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, Hsien-Hsin S. Lee	Kicking the tires of software transactional memory: why the going gets tough.	SPAA	2008	DBLP DOI BibTeX RDF	performance, compiler, measurement, software transactional memory, runtime, c/c++
1	Richard M. Yoo, Hsien-Hsin S. Lee	Adaptive transaction scheduling for transactional memory systems.	SPAA	2008	DBLP DOI BibTeX RDF	contention intensity, transaction effectiveness, transactional memory systems, performance, parallelism
1	Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee	Memory-Centric Security Architecture.	T. HiPEAC	2007	DBLP DOI BibTeX RDF
1	Xiaotong Zhuang, Hsien-Hsin S. Lee	Reducing Cache Pollution via Dynamic Data Prefetch Filtering.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Prefetch, microarchitecture, memory subsystems
1	Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh	Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Dean L. Lewis, Hsien-Hsin S. Lee	A scanisland based design enabling prebond testability in die-stacked microprocessors.	ITC	2007	DBLP DOI BibTeX RDF
1	Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee	An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems.	FPL	2007	DBLP DOI BibTeX RDF
1	Mrinmoy Ghosh, Hsien-Hsin S. Lee	Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs.	MICRO	2007	DBLP DOI BibTeX RDF
1	Eric Fontaine, Hsien-Hsin S. Lee	Optimizing Katsevich image reconstruction algorithm on multicore processors.	ICPADS	2007	DBLP DOI BibTeX RDF
1	Mrinmoy Ghosh, Hsien-Hsin S. Lee	Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems.	ICPADS	2007	DBLP DOI BibTeX RDF
1	Weidong Shi, Hsien-Hsin S. Lee	Accelerating memory decryption and authentication with frequent value prediction.	Conf. Computing Frontiers	2007	DBLP DOI BibTeX RDF	message authentication, value prediction, secure processors
1	Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee	Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling.	ASP-DAC	2007	DBLP DOI BibTeX RDF	wire-length driven floorplan, noise-direct, power supply noise aware floorplanning, microarchitecture profiling, aggressive power saving techniques, power delivery network, power consumption reduction, self weighting, correlation weighting, force-directed floorplanning algorithm, power pin affinity, current consumption, di/dt control, supply-noise margin violations, clock-gating, microprocessor designers, power constraints, inductive noise, decoupling capacitances
1	Chenghuai Lu, Tao Zhang, Weidong Shi, Hsien-Hsin S. Lee	M-TREE: A high efficiency security architecture for protecting integrity and privacy of software.	J. Parallel Distrib. Comput.	2006	DBLP DOI BibTeX RDF
1	Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim	Profile-guided microarchitectural floor planning for deep submicron processor design.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
1	Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmoy Ghosh	An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors.	ISCA	2006	DBLP DOI BibTeX RDF
1	Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee	Efficient System-on-Chip Energy Management with a Segmented Bloom Filter.	ARCS	2006	DBLP DOI BibTeX RDF
1	Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhang, San Nguyen, Hsien-Hsin S. Lee	A low-cost memory remapping scheme for address bus protection.	PACT	2006	DBLP DOI BibTeX RDF	address bus leakage protection, secure processor
1	Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee	A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design.	MICRO	2006	DBLP DOI BibTeX RDF
1	Weidong Shi, Hsien-Hsin S. Lee	Authentication Control Point and Its Implications For Secure Processor Design.	MICRO	2006	DBLP DOI BibTeX RDF
1	Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, Hsien-Hsin S. Lee	Reducing energy of virtual cache synonym lookup using bloom filters.	CASES	2006	DBLP DOI BibTeX RDF	low power, cache, bloom filter, synonym
1	Chinnakrishnan S. Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, Hsien-Hsin S. Lee	Entropy-based low power data TLB design.	CASES	2006	DBLP DOI BibTeX RDF	low-power TLB, spatial and temporal locality, entropy
1	Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh	Microarchitectural floorplanning under performance and thermal tradeoff.	DATE	2006	DBLP DOI BibTeX RDF
1	Richard M. Yoo, Han Lee, Kingsum Chow, Hsien-Hsin S. Lee	Constructing a Non-Linear Model with Neural Networks for Workload Characterization.	IISWC	2006	DBLP DOI BibTeX RDF
1	Weidong Shi, Joshua B. Fryman, Guofei Gu, Hsien-Hsin S. Lee, Youtao Zhang, Jun Yang 0002	InfoShield: a security architecture for protecting information usage in memory.	HPCA	2006	DBLP DOI BibTeX RDF
1	Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, Mrinmoy Ghosh	Towards the issues in architectural support for protection of software execution.	SIGARCH Computer Architecture News	2005	DBLP DOI BibTeX RDF	security, encryption, attack, tamper resistance, copy protection
1	Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, Alexandra Boldyreva	High Efficiency Counter Mode Security Architecture via Prediction and Precomputation.	ISCA	2005	DBLP DOI BibTeX RDF
1	Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, Milos Prvulovic	Synonymous address compaction for energy reduction in data TLB.	ISLPED	2005	DBLP DOI BibTeX RDF	low-power TLB, spatial and temporal locality, multi-porting
1	Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee	Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs.	DAC	2005	DBLP DOI BibTeX RDF	heterogeneous, cache coherence, MPSoC, real-time and embedded systems, inter-processor communication
1	Martin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, Jürgen Jeitner	Owl: next generation system monitoring.	Conf. Computing Frontiers	2005	DBLP DOI BibTeX RDF	autonomous performance monitoring, performance analysis, reconfiguration
1	Weidong Shi, Hsien-Hsin S. Lee, Guofei Gu, Laura Falk, Trevor N. Mudge, Mrinmoy Ghosh	An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor.	ICAC	2005	DBLP DOI BibTeX RDF	Intrusion-tolerant computing, survivable service, buffer overflow, self-healing, rootkits, chip multi processor
1	Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee	Wire-driven microarchitectural design space exploration.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Weidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee	Memory-Centric Security Architecture.	HiPEAC	2005	DBLP DOI BibTeX RDF
1	Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough	Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2.	IEEE Micro	2004	DBLP DOI BibTeX RDF
1	Taeweon Suh, Hsien-Hsin S. Lee, Douglas M. Blough	Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1.	IEEE Micro	2004	DBLP DOI BibTeX RDF
1	Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu	Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.	IEEE PACT	2004	DBLP DOI BibTeX RDF
1	Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee	Choice Predictor for Free.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
1	Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim	Profile-guided microarchitectural floorplanning for deep submicron processor design.	DAC	2004	DBLP DOI BibTeX RDF	microarchitectural planning, computer architecture, floorplanning
1	Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, Tao Zhang	Attacks and risk analysis for hardware supported software copy protection systems.	Digital Rights Management Workshop	2004	DBLP DOI BibTeX RDF	attack, tamper resistance, copy protection
1	Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, Santosh Pande	Hardware assisted control flow obfuscation for embedded processors.	CASES	2004	DBLP DOI BibTeX RDF	obfuscation, control flow graph
1	Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee	Supporting Cache Coherence in Heterogeneous Multiprocessor Systems.	DATE	2004	DBLP DOI BibTeX RDF
1	Joshua B. Fryman, Chad Huneycutt, Hsien-Hsin S. Lee, Kenneth M. Mackenzie, David E. Schimmel	Energy-Efficient Network Memory for Ubiquitous Devices.	IEEE Micro	2003	DBLP DOI BibTeX RDF
1	Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, Hsien-Hsin S. Lee	Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints.	CGO	2003	DBLP DOI BibTeX RDF	predicate analysis, software pipelining, instruction scheduling, VLIW processor, resource utilization, predicated execution
1	Hsien-Hsin S. Lee, Chinnakrishnan S. Ballapuram	Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning.	ISLPED	2003	DBLP DOI BibTeX RDF	low-power TLB, multi-ported memory structures, energy optimization, low-power cache
1	Xiaotong Zhuang, Hsien-Hsin S. Lee	A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches.	ICPP	2003	DBLP DOI BibTeX RDF
1	Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Hsien-Hsin S. Lee	Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level.	ICCAD	2003	DBLP DOI BibTeX RDF
1	Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens	Improving Bandwidth Utilization using Eager Writeback.	J. Instruction-Level Parallelism	2001	DBLP BibTeX RDF
1	Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, Gary S. Tyson	Stack Value File: Custom Microarchitecture for the Stack.	HPCA	2001	DBLP DOI BibTeX RDF
1	Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens	Eager writeback - a technique for improving bandwidth utilization.	MICRO	2000	DBLP DOI BibTeX RDF
1	Hsien-Hsin S. Lee, Gary S. Tyson	Region-based caching: an energy-delay efficient memory architecture for embedded processors.	CASES	2000	DBLP DOI BibTeX RDF
1	Eric L. Boyd, Waqar Azeem, Hsien-Hsin S. Lee, Tien-Pao Shih, Shih-Hao Hung, Edward S. Davidson	A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1.	ICPP	1994	DBLP BibTeX RDF

Publications of "Hsien-Hsin S. Lee" ( http://dblp.L3S.de/Authors/Hsien-Hsin_S._Lee )