Search results for "Huazhong Yang"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Yongpan Liu, Yiqun Wang, Hengyu Long, Huazhong Yang	Lifetime-Aware Battery Allocation for Wireless Sensor Network under Cost Constraints.	IEICE Transactions	2012	DBLP BibTeX RDF
1	Guangyu Sun, Huazhong Yang, Yuan Xie	Performance/Thermal-Aware Design of 3D-Stacked L2 Caches for CMPs.	ACM Trans. Design Autom. Electr. Syst.	2012	DBLP DOI BibTeX RDF
1	Hongli Gao, Fei Qiao, Huazhong Yang	Design and implementation of motion compensator in memory reduced HDTV decoder with embedded compression engine.	Multimedia Tools Appl.	2012	DBLP DOI BibTeX RDF
1	Pengpeng Chen, Bo Zhao, Rong Luo, Huazhong Yang	A low-power all-digital GFSK demodulator with robust clock data recovery.	ACM Great Lakes Symposium on VLSI	2012	DBLP DOI BibTeX RDF
1	Xiaoming Chen, Yu Wang, Huazhong Yang	An adaptive LU factorization algorithm for parallel circuit simulation.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Shuangchen Li, Yongpan Liu, Daming Zhang, Xinyu He, Pei Zhang, Huazhong Yang	A hierarchical C2RTL framework for FIFO-connected stream applications.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Wei Liu, Xiaotian Fei, Tao Tang, Pengjun Wang, Hong Luo, Beixing Deng, Huazhong Yang	Application specific sensor node architecture optimization - Experiences from field deployments.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Yongpan Liu, Yiqun Wang, Hongyang Jia, Shan Su, Jinghuan Wen, Wenzhu Zhang, Lin Zhang, Huazhong Yang	An energy harvesting nonvolatile sensor node and its application to distributed moving object detection.	IPSN	2012	DBLP DOI BibTeX RDF
1	Yiqun Wang, Yongpan Liu, Yumeng Liu, Daming Zhang, Shuangchen Li, Baiko Sai, Mei-Fang Chiang, Huazhong Yang	A compression-based area-efficient recovery architecture for nonvolatile processors.	DATE	2012	DBLP BibTeX RDF
1	Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie	Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation.	IEEE Trans. Dependable Sec. Comput.	2011	DBLP DOI BibTeX RDF	temperature-aware NBTI modeling, circuit performance degradation, Negative bias temperature instability (NBTI), leakage reduction
1	Bo Zhao, Guangming Yu, Tao Chen, Pengpeng Chen, Huazhong Yang, Hui Wang	A Low-Power IF Circuit with 5 dB Minimum Input SNR for GFSK Low-IF Receivers.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Yongpan Liu, Shuangchen Li, Jue Wang, Beihua Ying, Huazhong Yang	An Energy Efficient Sensor Network Processor with Latency-Aware Adaptive Compression.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Fei Wei, Huazhong Yang	Mini-step Strategy for Transient Analysis	CoRR	2011	DBLP BibTeX RDF
1	Yu Wang 0002, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang	Leakage Power and Circuit Aging Cooptimization by Gate Replacement Techniques.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Yu Wang, Jiang Xu, Yan Xu, Weichen Liu, Huazhong Yang	Power Gating Aware Task Scheduling in MPSoC.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Xiaoming Chen, Wei Wu, Yu Wang, Hao Yu, Huazhong Yang	An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation.	IEEE Trans. on Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Hong Luo, Xiaoming Chen, Jyothi Velamala, Yu Wang, Yu Cao, Vikas Chandra, Yuchun Ma, Huazhong Yang	Circuit-level delay modeling considering both TDDB and NBTI.	ISQED	2011	DBLP DOI BibTeX RDF
1	Wulong Liu, Yu Wang 0002, Wei Liu, Yuchun Ma, Yuan Xie, Huazhong Yang	On-chip hybrid power supply system for wireless sensor nodes.	ASP-DAC	2011	DBLP DOI BibTeX RDF
1	Tianji Wu, Di Wu, Yu Wang, Xiaorui Zhang, Hong Luo, Ningyi Xu, Huazhong Yang	Gemma in April: A matrix-like parallel programming architecture on OpenCL.	DATE	2011	DBLP DOI BibTeX RDF
1	Yinan Sun, Yongpan Liu, Xiaohan Wang, Hongliang Xu, Huazhong Yang	Design methodology of multistage time-domain logic speculation circuits.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Wei Wu, Yi Shan, Xiaoming Chen, Yu Wang, Huazhong Yang	FPGA Accelerated Parallel Sparse Matrix Factorization for Circuit Simulations.	ARC	2011	DBLP DOI BibTeX RDF
1	Zidong Du, Bingbing Xia, Fei Qiao, Huazhong Yang	System-Level Evaluation of Video Processing System Using SimpleScalar-Based Multi-core Processor Simulator.	ISADS	2011	DBLP DOI BibTeX RDF
1	Ni Zhou, Fei Qiao, Huazhong Yang, Hui Wang	Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding.	ISADS	2011	DBLP DOI BibTeX RDF
1	Xueqing Li, Qi Wei, Huazhong Yang	Code-independent output impedance: A new approach to increasing the linearity of current-steering DACs.	ICECS	2011	DBLP DOI BibTeX RDF
1	Yu Wang, Mo Xu, Ling Ren, Xiaorui Zhang, Di Wu, Yong He, Ningyi Xu, Huazhong Yang	A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis.	ICCAD	2011	DBLP DOI BibTeX RDF
1	Li Li, Yongpan Liu, Huazhong Yang, Hui Wang 0004	Lightweight Precision-Adaptive Time Synchronization in Wireless Sensor Networks.	IEICE Transactions	2010	DBLP BibTeX RDF
1	Yongpan Liu, Huazhong Yang	Temperature-Aware Leakage Estimation Using Piecewise Linear Power Models.	IEICE Transactions	2010	DBLP BibTeX RDF
1	Fei Wei, Huazhong Yang	Transmission Line Inspires A New Distributed Algorithm to Solve the Nonlinear Dynamical System of Physical Circuit	CoRR	2010	DBLP BibTeX RDF
1	Qian Ding, Yu Wang, Hui Wang, Rong Luo, Huazhong Yang	Output remapping technique for critical paths soft-error rate reduction.	IET Computers & Digital Techniques	2010	DBLP DOI BibTeX RDF
1	Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang 0004	A fault-tolerant structure for reliable multi-core systems based on hardware-software co-design.	ISQED	2010	DBLP DOI BibTeX RDF
1	Yongpan Liu, Yinan Sun, Yihao Zhu, Huazhong Yang	Design methodology of variable latency adders with multistage function speculation.	ISQED	2010	DBLP DOI BibTeX RDF
1	Shuhua Zhang, Weibei Dou, Ping Chi, Huazhong Yang	MDCT spectrum separation: Catching the fine spectral structures for stereo coding.	ICASSP	2010	DBLP DOI BibTeX RDF
1	Di Wu, Tianji Wu, Yi Shan, Yu Wang 0002, Yong He, Ningyi Xu, Huazhong Yang	Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis.	ICPADS	2010	DBLP DOI BibTeX RDF
1	Yi Shan, Bo Wang, Jing Yan, Yu Wang 0002, Ning-Yi Xu, Huazhong Yang	FPMR: MapReduce framework on FPGA.	FPGA	2010	DBLP DOI BibTeX RDF	FPGA framework, RankBoost, MapReduce
1	Shuhua Zhang, Weibei Dou, Huazhong Yang	Maximal Coherence Rotation for stereo coding.	ICME	2010	DBLP DOI BibTeX RDF
1	Hong Luo, Yu Wang 0002, Rong Luo, Huazhong Yang, Yuan Xie	Temperature-Aware NBTI Modeling Techniques in Digital Circuits.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Yu Wang 0002, Xukai Shen, Rong Luo, Huazhong Yang	Leakage Power Reduction through Dual Vth Assignment Considering Threshold voltage Variation.	Journal of Circuits, Systems, and Computers	2009	DBLP DOI BibTeX RDF
1	Fei Wei, Huazhong Yang	Waveform Transmission Method, a New Waveform-relaxation Based Algorithm to Solve Ordinary Differential Equations in Parallel	CoRR	2009	DBLP BibTeX RDF
1	Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang 0004	A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design	CoRR	2009	DBLP BibTeX RDF
1	Fei Wei, Huazhong Yang	From devil to angel, transmission lines boost parallel computing of linear resistor networks	CoRR	2009	DBLP BibTeX RDF
1	Yu Wang 0002, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang	On the efficacy of input Vector Control to mitigate NBTI effects and leakage power.	ISQED	2009	DBLP DOI BibTeX RDF
1	Yan Xu, Weichen Liu, Yu Wang, Jiang Xu, Xiaoming Chen, Huazhong Yang	On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Xiaoming Chen, Yu Wang 0002, Yu Cao, Yuchun Ma, Huazhong Yang	Variation-aware supply voltage assignment for minimizing circuit degradation and leakage.	ISLPED	2009	DBLP DOI BibTeX RDF	dynamic vdd scaling, leakage power, negative bias temperature instability (NBTI), dual vdd
1	Jue Wang, Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang 0004	Energy efficient architecture of sensor network node based on compression accelerator.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	compression accelerator, wireless sensor network, energy efficient, chip design
1	Yu Wang 0002, Jiang Xu, Shengxi Huang, Weichen Liu, Huazhong Yang	A case study of on-chip sensor network in multiprocessor system-on-chip.	CASES	2009	DBLP DOI BibTeX RDF	sensor network, reliability, low-power, system on chip, dynamic control, power grid noise
1	Yu Wang 0002, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang	Gate replacement techniques for simultaneous leakage and aging optimization.	DATE	2009	DBLP BibTeX RDF
1	Hengyu Long, Yongpan Liu, Xiaoguang Fan, Robert P. Dick, Huazhong Yang	Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks.	DATE	2009	DBLP BibTeX RDF
1	Hengyu Long, Yongpan Liu, Yiqun Wang, Robert P. Dick, Huazhong Yang	Battery allocation for wireless sensor network lifetime maximization under cost constraints.	ICCAD	2009	DBLP BibTeX RDF
1	Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang 0004	Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection.	Science in China Series F: Information Sciences	2008	DBLP DOI BibTeX RDF	low-swing interface, differential signaling, tapered-buffer, interconnect, asynchronous circuit, low power circuit
1	Fei Wei, Huazhong Yang	Directed Transmission Method, A Fully Asynchronous Approach to Solve Sparse Linear Systems in Parallel	CoRR	2008	DBLP BibTeX RDF
1	Fei Wei, Huazhong Yang	Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear Systems	CoRR	2008	DBLP BibTeX RDF
1	Saihua Lin, Huazhong Yang, Rong Luo	A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD Systems.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Ku He, Rong Luo, Hui Wang 0004, Huazhong Yang	Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Qian Ding, Yu Wang 0002, Hui Wang 0004, Rong Luo, Huazhong Yang	Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths.	ISQED	2008	DBLP DOI BibTeX RDF
1	Saihua Lin, Yu Wang 0002, Rong Luo, Huazhong Yang	A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application.	ASP-DAC	2008	DBLP DOI BibTeX RDF
1	Fei Wei, Huazhong Yang	Directed transmission method, a fully asynchronous approach to solve sparse linear systems in parallel.	SPAA	2008	DBLP DOI BibTeX RDF	convergence theory, directed transmission method (dtm), virtual transmission method (vtm), distributed algorithm, sparse linear system, asynchronous algorithm
1	Fei Wei, Huazhong Yang	Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear Systems.	NCM	2008	DBLP DOI BibTeX RDF	Virtual Transmission Method (VTM), Electric Vertex Splitting (EVS), Convergence Theory, Distributed algorithm, Sparse Linear System
1	Yang Li, Shuzheng Xu, Huazhong Yang	Design of Signal Constellations in the Presence of Phase Noise.	VTC Fall	2008	DBLP DOI BibTeX RDF
1	Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang 0004	Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed.	Journal of Circuits, Systems, and Computers	2007	DBLP DOI BibTeX RDF
1	JianXing Fan, Huazhong Yang, Hui Wang 0004, Xiaolang Yan, Chaohuan Hou	Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations.	Science in China Series F: Information Sciences	2007	DBLP DOI BibTeX RDF	periodic time-varying, Sylvester theorem, power-law spectrum, Lorentzian spectrum, Floquet exponent, stochastic calculus, phase noise
1	Saihua Lin, Huazhong Yang, Rong Luo	A Novel gamma d/n, RLCG Transmission Line Model Considering Complex RC(L) Loads.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang 0004, Li Shang	Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems.	ISQED	2007	DBLP DOI BibTeX RDF
1	Hong Luo, Yu Wang 0002, Ku He, Rong Luo, Huazhong Yang, Yuan Xie	Modeling of PMOS NBTI Effect Considering Temperature Variation.	ISQED	2007	DBLP DOI BibTeX RDF
1	Saihua Lin, Huazhong Yang, Rong Luo	High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit.	ISVLSI	2007	DBLP DOI BibTeX RDF
1	Hong Luo, Yu Wang 0002, Ku He, Rong Luo, Huazhong Yang, Yuan Xie	A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect.	PATMOS	2007	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie	Temperature-aware NBTI modeling and the impact of input vector control on performance degradation.	DATE	2007	DBLP DOI BibTeX RDF
1	Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Yang	Accurate temperature-dependent integrated circuit leakage power estimation is easy.	DATE	2007	DBLP DOI BibTeX RDF
1	Saihua Lin, Huazhong Yang, Rong Luo	A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Shaohua Wang, Jinguo Quan, Rong Luo, Hao Cheng, Huazhong Yang	A Noise Reduced Digitally Controlled Oscillator Using Complementary Varactor Pairs.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Shuzheng Xu, Pengjun Wang, Feng Zhang, Huazhong Yang	DRM - the Digital Radio on the Way.	ISCC	2007	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Huazhong Yang, Hui Wang 0004	Signal-Path-Level Dual-VT Assignment for Leakage Power Reduction.	Journal of Circuits, Systems, and Computers	2006	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang 0004	Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization.	ISQED	2006	DBLP DOI BibTeX RDF
1	Saihua Lin, Hongli Gao, Huazhong Yang	Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS.	PATMOS	2006	DBLP DOI BibTeX RDF
1	Saihua Lin, Huazhong Yang	Worst Case Crosstalk Noise Effect Analysis in DSM Circuits by ABCD Modeling.	PATMOS	2006	DBLP DOI BibTeX RDF
1	Hai Lin, Yu Wang 0002, Rong Luo, Huazhong Yang, Hui Wang 0004	IR-drop Reduction Through Combinational Circuit Partitioning.	PATMOS	2006	DBLP DOI BibTeX RDF	Static Timing Analysis, IR-drop, circuit partitioning
1	Yu Wang 0002, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang 0004	Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits.	ISLPED	2006	DBLP DOI BibTeX RDF	leakage current reduction, two-phase fine-grain sleep transistor insertion, mixed integer linear programming
1	Qihong Ge, Huazhong Yang	A Noise-resilient Channel Estimation Algorithm Based on Two-Dimensional Hadamard Transform for OFDM Systems.	ICN/ICONS/MCL	2006	DBLP DOI BibTeX RDF	Noise-resilient, OFDM, channel estimation, Hadamard transform
1	Yu Wang 0002, Yongpan Liu, Rong Luo, Huazhong Yang	Genetic Algorithm Based Fine-Grain Sleep Transistor Insertion Technique for Leakage Optimization.	ICNC	2006	DBLP DOI BibTeX RDF
1	Hong Luo, Huazhong Yang, Rong Luo	Accurate and Fast Estimation of Junction Band-to-Band Leakage in Nanometer-Scale MOSFET.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Hui Wang 0004, Huazhong Yang	Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang 0004	A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices.	APCCAS	2006	DBLP DOI BibTeX RDF
1	Jun Chen, Rong Luo, Huazhong Yang, Hui Wang 0004	A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator.	VLSI Design	2006	DBLP DOI BibTeX RDF	Direct digital frequency synthesizer (DDFS), preset value phase accumulator (PVPA), ROM-less look up table, low power
1	Shuzheng Xu, Huazhong Yang, Hui Wang	Application of DAPSK in HF communications.	IEEE Communications Letters	2005	DBLP DOI BibTeX RDF
1	Juan Wang, Jinguo Quan, Huazhong Yang, Hui Zhong, Sheng Lin	A Robust and Low Complexity Coarse Frequency Offset Estimation Algorithm for DAB Receivers.	ICWN	2005	DBLP BibTeX RDF
1	Hui Zhang, Huazhong Yang, Shuzheng Xu, Hui Wang 0004	Improved Multiuser Detection for Fast FH/MFSK Systems.	ICWN	2005	DBLP BibTeX RDF
1	Zhixin Tian, Huazhong Yang, Rong Luo	Gibbs sampling in power grid analysis.	ASP-DAC	2005	DBLP DOI BibTeX RDF
1	Yongpan Liu, Huazhong Yang, Rong Luo, Hui Wang 0004	A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms.	ICNC	2005	DBLP DOI BibTeX RDF
1	Qihong Ge, Huazhong Yang	Comb-Pattern Optimal Pilot in MIMO-OFDM System.	ICCNMC	2005	DBLP DOI BibTeX RDF	comb-pattern, OFDM, MIMO, pilot
1	Huazhong Yang, Guanzhang Hu	Laplacian spectrum analysis and spanning tree algorithm for circuit partitioning problems.	Science in China Series F: Information Sciences	2003	DBLP DOI BibTeX RDF
1	Huazhong Yang, Rong Luo, Hui Wang 0004, Runsheng Liu	An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits.	ASP-DAC	1999	DBLP DOI BibTeX RDF

Publications of "Huazhong Yang" ( http://dblp.L3S.de/Authors/Huazhong_Yang )