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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 30 occurrences of 26 keywords
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Results
Found 25 publication records. Showing 25 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yi Yang, Ping Xiang, Mike Mantor, Huiyang Zhou |
CPU-assisted GPGPU on fused CPU-GPU architectures.  |
HPCA  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Martin Dimitrov, Huiyang Zhou |
Time-Ordered Event Traces: A New Debugging Primitive for Concurrency Bugs. |
IPDPS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Yi Yang, Ping Xiang, Jingfei Kong, Huiyang Zhou |
A GPGPU compiler for memory optimization and parallelism management. |
PLDI |
2010 |
DBLP DOI BibTeX RDF |
compiler, gpgpu |
| 1 | Jingfei Kong, Martin Dimitrov, Yi Yang, Janaka Liyanage, Lin Cao, Jacob Staples, Mike Mantor, Huiyang Zhou |
Accelerating MATLAB Image Processing Toolbox functions on GPUs. |
GPGPU |
2010 |
DBLP DOI BibTeX RDF |
image processing, GPGPU, CUDA, MATLAB, OpenCL |
| 1 | Jingfei Kong, Huiyang Zhou |
Improving privacy and lifetime of PCM-based main memory. |
DSN |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Yi Yang, Ping Xiang, Jingfei Kong, Huiyang Zhou |
An optimizing compiler for GPGPU programs with input-data sharing. |
PPOPP |
2010 |
DBLP DOI BibTeX RDF |
compiler, gpgpu |
| 1 | Martin Dimitrov, Mike Mantor, Huiyang Zhou |
Understanding software approaches for GPGPU reliability. |
GPGPU |
2009 |
DBLP DOI BibTeX RDF |
reliability, GPGPU |
| 1 | Martin Dimitrov, Huiyang Zhou |
Anomaly-based bug prediction, isolation, and validation: an automated approach for software debugging. |
ASPLOS |
2009 |
DBLP DOI BibTeX RDF |
automated debugging, architectural support |
| 1 | Jingfei Kong, Onur Aciiçmez, Jean-Pierre Seifert, Huiyang Zhou |
Hardware-software integrated approaches to defend against software cache-based side channel attacks. |
HPCA |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zhou |
Address-branch correlation: A novel locality for long-latency hard-to-predict branches. |
HPCA |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Jingfei Kong, Onur Aciiçmez, Jean-Pierre Seifert, Huiyang Zhou |
Deconstructing new cache designs for thwarting software cache-based side channel attacks. |
CSAW |
2008 |
DBLP DOI BibTeX RDF |
microarchitectural analysis, cryptanalysis, side-channel analysis, timing attack, cache architecture, cache attack |
| 1 | Yi Ma, Hongliang Gao, Martin Dimitrov, Huiyang Zhou |
Optimizing Dual-Core Execution for Power Efficiency and Transient-Fault Recovery. |
IEEE Trans. Parallel Distrib. Syst. |
2007 |
DBLP DOI BibTeX RDF |
Multiple data stream architectures, fault tolerance, low-power design |
| 1 | Martin Dimitrov, Huiyang Zhou |
Unified Architectural Support for Soft-Error Protection or Software Bug Detection. |
PACT |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Huiyang Zhou |
A case for fault tolerance and performance enhancement using chip multi-processors. |
Computer Architecture Letters |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi Ma, Hongliang Gao, Huiyang Zhou |
Using Indexing Functions to Reduce Conflict Aliasing in Branch Prediction Tables. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
Processor architectures |
| 1 | Jingfei Kong, Cliff Changchun Zou, Huiyang Zhou |
Improving software security via runtime instruction-level taint checking. |
ASID |
2006 |
DBLP DOI BibTeX RDF |
format string, hardware tagging, buffer overflow |
| 1 | Yi Ma, Huiyang Zhou |
Efficient Transient-Fault Tolerance for Multithreaded Processors using Dual-Thread Execution. |
ICCD |
2006 |
DBLP BibTeX RDF |
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| 1 | Huiyang Zhou, Thomas M. Conte |
Enhancing Memory-Level Parallelism via Recovery-Free Value Prediction. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Single data stream architectures |
| 1 | Huiyang Zhou |
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window. |
IEEE PACT |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte |
Adaptive mode control: A static-power-efficient cache design. |
ACM Trans. Embedded Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
adaptive mode control, Cache, static power |
| 1 | Huiyang Zhou, Jill Flanagan, Thomas M. Conte |
Detecting Global Stride Locality in Value Streams. (PDF / PS) |
ISCA |
2003 |
DBLP DOI BibTeX RDF |
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| 1 | Huiyang Zhou, Thomas M. Conte |
Enhancing memory level parallelism via recovery-free value prediction. |
ICS |
2003 |
DBLP DOI BibTeX RDF |
recovery-free value prediction, prefetching, memory disambiguation, memory level parallelism |
| 1 | Huiyang Zhou, Thomas M. Conte |
Code Size Efficiency in Global Scheduling for ILP Processors. |
Interaction between Compilers and Computer Architectures |
2002 |
DBLP DOI BibTeX RDF |
Code Size Efficiency, I-cache Performance, Code Replication, Tail Duplication, Optimal Code Size Efficiency, Diminishing Returns, Quantitative Measure, Instruction Level Parallelism (ILP) |
| 1 | Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte |
Adaptive Mode Control: A Static-Power-Efficient Cache Design. |
IEEE PACT |
2001 |
DBLP DOI BibTeX RDF |
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| 1 | Huiyang Zhou, Matthew D. Jennings, Thomas M. Conte |
Tree Traversal Scheduling: A Global Instruction Scheduling Technique for VLIW/EPIC Processors. |
LCPC |
2001 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #25 of 25 (100 per page; Change: )
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