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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 12 occurrences of 12 keywords
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Results
Found 58 publication records. Showing 58 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Min-Yuan Cheng, Kuo-Yu Huang, Hung-Ming Chen |
Dynamic guiding particle swarm optimization with embedded chaotic search for solving multidimensional problems.  |
Optimization Letters  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Chieh-Jui Lee, Shih-Ying Liu, Chuan-Chia Huang, Hung-Ming Chen, Chang-Tzu Lin, Chia-Hsin Lee |
Hierarchical power network synthesis for multiple power domain designs. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yeh-Chi Chang, Chun-Kai Wang, Hung-Ming Chen |
On construction low power and robust clock tree via slew budgeting. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Suradeth Aroonsantidecha, Shih-Ying Liu, Ching-Yu Chin, Hung-Ming Chen |
A fast thermal aware placement with accurate thermal analysis based on Green function. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Shih-Ying Liu, Chieh-Jui Lee, Hung-Ming Chen |
Agglomerative-based flip-flop merging with signal wirelength optimization. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Hsin-Wu Hsu, Meng-Ling Chen, Hung-Ming Chen, Hung-Chun Li, Shi-Hao Chen |
On effective flip-chip routing via pseudo single redistribution layer. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Wei-Ko Kao, Hung-Ming Chen, Jui-Sheng Chou |
Aseismic ability estimation of school building using predictive data mining models. |
Expert Syst. Appl. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Ren-Jie Lee, Hung-Ming Chen |
Efficient Package Pin-Out Planning With System Interconnects Optimization for Package-Board Codesign. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
Design Planning with 3D-Via Optimization in Alternative Stacking Integrated Circuits. |
J. Inf. Sci. Eng. |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chia-Yi Lin, Hung-Ming Chen |
A Generic Multi-Dimensional Scan-Control Scheme for Test-Cost Reduction. |
J. Inf. Sci. Eng. |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chang-Cheng Tsai, Tzu-Hen Lin, Shin-Han Tsai, Hung-Ming Chen |
Clock planning for multi-voltage and multi-mode designs. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kuo-Hsuan Meng, Po-Cheng Pan, Hung-Ming Chen |
Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Meng-Chen Wu, Hung-Ming Chen, Jing-Yang Jou |
Mixed non-rectangular block packing for non-Manhattan layout architectures. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Chuan-Pin Lu, Jui-Pin Li, Wei-Yi Liou, Hung-Ming Chen |
The Development of Smart Assistive Technology Devices for Urinary Catheterization Monitoring. |
ICGEC |
2011 |
DBLP DOI BibTeX RDF |
assistive technology devices, urinary catheterization, tele-healthcare |
| 1 | Ren-Jie Lee, Hung-Ming Chen |
Row-based area-array I/O design planning in concurrent chip-package design flow. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Ying Tsai, Ren-Jie Lee, Ching-Yu Chin, Chung-Yi Kuan, Hung-Ming Chen, Y. Kajitani |
On routing fixed escaped boundary pins for high speed boards. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Rong Chen, Hung-Ming Chen, Shih-Ying Liu |
TSV-based 3D-IC placement for timing optimization. |
SoCC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen |
Fast analog layout prototyping for nanometer design migration. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng-Fu Liang, Hung-Ming Chen, Yi-Che Liu |
Image Enlargement by Applying Coordinate Rotation and Kernel Stretching to Interpolation Kernels. |
EURASIP J. Adv. Sig. Proc. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Yi Lin, Li-Chung Hsu, Hung-Ming Chen |
On Reducing Test Power, Volume and Routing Cost by Chain Reordering and Test Compression Techniques. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Chia-Yi Lin, Hsiu-Chuan Lin, Hung-Ming Chen |
On Reducing Test Power and Test Volume by Selective Pattern Compression Schemes. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Yi Lin, Hung-Ming Chen |
A novel two-dimensional scan-control scheme for test-cost reduction. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Fang-Yu Fan, Hung-Ming Chen, I-Min Liu |
Technology mapping with crosstalk noise avoidance. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Houng-Yi Li, Iris Hui-Ru Jiang, Hung-Ming Chen |
Simultaneous voltage island generation and floorplanning. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Meng-Chen Wu, Ming-Ching Lu, Hung-Ming Chen, Jing-Yang Jou |
Performance-constrained voltage assignment in multiple supply voltage SoC floorplanning. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ren-Jie Lee, Hung-Ming Chen |
Fast Flip-Chip Pin-Out Designation Respin for Package-Board Codesign. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hsin-Hua Pan, Hung-Ming Chen, Chia-Yi Chang |
Buffer/flip-flop block planning for power-integrity-driven floorplanning. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan |
A stochastic-based efficient critical area extractor on OpenAccess platform. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
OpenAccess, critical area analysis |
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu, Wen-Yu Shih |
Package routability- and IR-drop-aware finger/pad assignment in chip-package co-design. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hung-Ming Chen, Yu-Chin Lin |
Web-FEM: An internet-based finite-element analysis framework with 3D graphics and parallel computing environment. |
Advances in Engineering Software |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
Effective decap insertion in area-array SoC floorplan design. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
decap insertion, floorplan, Power supply noise |
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
An Effective Decap Insertion Method Considering Power Supply Noise during Floorplanning. |
J. Inf. Sci. Eng. |
2008 |
DBLP BibTeX RDF |
|
| 1 | Ming-Fang Lai, Hung-Ming Chen |
An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
Chip-Package Codesign, I/O Placement, Power Integrity |
| 1 | Lun-Chun Wei, Hung-Ming Chen, Li-Da Huang, Sarah Songjie Xu |
Efficient and optimal post-layout double-cut via insertion by network relaxation and min-cost maximum flow. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
redundant via insertion, network flow, relaxation |
| 1 | Bruce Tseng, Hung-Ming Chen |
Blockage and voltage island-aware dual-vdd buffered tree construction under fixed buffer locations. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
voltage island architecture, low power, buffer insertion |
| 1 | Wen-Lin Huang, Hung-Ming Chen, Shiow-Fen Hwang, Shinn-Ying Ho |
Accurate prediction of enzyme subfamily class using an adaptive fuzzy k-nearest neighbor method. |
Biosystems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, Bo-Fu Liu, Hui-Ling Huang, Shiow-Fen Hwang, Shinn-Ying Ho |
SODOCK: Swarm optimization for highly flexible protein-ligand docking. |
Journal of Computational Chemistry |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu |
On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen |
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi-Yi Yeh, Hung-Ming Chen, Li-Da Huang, Wei-Ting Wei, Chao-Hung Lu, Chien-Nan Jimmy Liu |
Using power gating techniques in area-array SoC floorplan design. |
SoCC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Yi Lin, Hung-Ming Chen |
A selective pattern-compression scheme for power and test-data reduction. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Po-Hung Chen, Hung-Ming Chen, Kuo-Jui Hung, Wen-Hsien Fang, Mon-Chau Shie, Feipei Lai |
Markov model fuzzy-reasoning based algorithm for fast block motion estimation. |
J. Visual Communication and Image Representation |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, I-Min Liu, Martin D. F. Wong |
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Li-Chung Hsu, Hung-Ming Chen |
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Shinn-Ying Ho, Chih-Hung Hsieh, Kuan-Wei Chen, Hui-Ling Huang, Hung-Ming Chen, Shinn-Jang Ho |
Scoring Method for Tumor Prediction from Microarray Data Using an Evolutionary Fuzzy Classifier. |
PAKDD |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, Li-Da Huang, I-Min Liu, Martin D. F. Wong |
Simultaneous power supply planning and noise avoidance in floorplan design. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian-Hung Chen, Hung-Ming Chen, Shinn-Ying Ho |
Design of nearest neighbor classifiers: multi-objective approach. |
Int. J. Approx. Reasoning |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Muzhou Shao, Youxin Gao, Li-Pen Yuan, Hung-Ming Chen, Martin D. F. Wong |
Current Calculation on VLSI Signal Interconnects. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo-Fu Liu, Hung-Ming Chen, Jian-Hung Chen, Shiow-Fen Hwang, Shinn-Ying Ho |
MeSwarm: memetic particle swarm optimization. |
GECCO |
2005 |
DBLP DOI BibTeX RDF |
ant colony optimization and swarm intelligence, solis and wets local search strategy, evolutionary computation, particle swarm optimization, local search, memetic algorithms, numerical optimization |
| 1 | Shinri-Ying Ho, Chong-Cheng Lee, Hung-Ming Chen, Hui-Ling Huang |
Efficient gene selection for classification of microarray data. |
Congress on Evolutionary Computation |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo-Fu Liu, Hung-Ming Chen, Hui-Ling Huang, Shiow-Fen Hwang, Shinn-Ying Ho |
Flexible protein-ligand docking using particle swarm optimization. |
Congress on Evolutionary Computation |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Shinn-Ying Ho, Hung-Ming Chen, Shinn-Jang Ho, Tai-Kang Chen |
Design of accurate classifiers with a compact fuzzy-rule base using an evolutionary scatter partition of feature space. |
IEEE Transactions on Systems, Man, and Cybernetics, Part B |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian-Hung Chen, Hung-Ming Chen, Shinn-Ying Ho |
Design of Nearest Neighbor Classifiers Using an Intelligent Multi-objective Evolutionary Algorithm. |
PRICAI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang |
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Li-Da Huang, Hung-Ming Chen, D. F. Wong |
Global Wire Bus Configuration with Minimum Delay Uncertainty. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, D. F. Wong, Wai-Kei Mak, Hannah Honghua Yang |
Faster and more accurate wiring evaluation in interconnect-centric floorplanning. |
ACM Great Lakes Symposium on VLSI |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz, D. F. Wong |
Integrated power supply planning and floorplanning. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani |
Integrated floorplanning and interconnect planning. |
ICCAD |
1999 |
DBLP BibTeX RDF |
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