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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3 occurrences of 3 keywords
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Results
Found 15 publication records. Showing 15 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
DEFCAM: A design and evaluation framework for defect-tolerant cache memories.  |
TACO  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
CloudCache: Expanding and shrinking private caches. |
HPCA |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Hyunjin Lee, Lei Jin, Kiyeon Lee, Socrates Demetriades, Michael Moeng, Sangyeun Cho |
Two-phase trace-driven simulation (TPTS): a fast multicore processor architecture simulation approach. |
Softw., Pract. Exper. |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
PERFECTORY: A Fault-Tolerant Directory Memory Architecture. |
IEEE Trans. Computers |
2010 |
DBLP DOI BibTeX RDF |
chip yield, lifetime reliability, Chip multiprocessor, cache coherence |
| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
StimulusCache: Boosting performance of chip multiprocessors with excess cache. |
HPCA |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Taecheol Oh, Hyunjin Lee, Kiyeon Lee, Sangyeun Cho |
An Analytical Model to Study Optimal Area Breakdown between Cores and Caches in a Chip Multiprocessor. |
ISVLSI |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Sangyeun Cho, Hyunjin Lee |
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
memory write performance, phase-change memory |
| 1 | Sangyeun Cho, Socrates Demetriades, Shayne Evans, Lei Jin, Hyunjin Lee, Kiyeon Lee, Michael Moeng |
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation. |
ICPP |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
Performance of Graceful Degradation for Cache Faults. |
ISVLSI |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Hyunjin Lee, Sangyeun Cho, Bruce R. Childers |
Exploring the interplay of yield, area, and performance in processor caches. |
ICCD |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Kuk-Hwan Kim, Hyunjin Lee, Yang-Kyu Choi |
Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate. |
IEICE Transactions |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Lei Jin, Hyunjin Lee, Sangyeun Cho |
A flexible data to L2 cache mapping approach for future multicore processors. |
Memory System Performance and Correctness |
2006 |
DBLP DOI BibTeX RDF |
non-uniform cache architecture (NUCA), page allocation |
| 1 | Wonik Park, Wonil Kim, Sanggil Kang, Hyunjin Lee, Young-Kuk Kim |
Personalized Digital E-library Service Using Users' Profile Information. |
ECDL |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Tae-Chang Jee, Hyunjin Lee, Yillbyung Lee |
Shrinking Number of Clusters by Multi-Dimensional Scaling. |
SWAP |
2006 |
DBLP BibTeX RDF |
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| 1 | Hyunjin Lee, Hyeyoung Park, Yillbyung Lee |
Network Optimization through Learning and Pruning in Neuromanifold. |
PRICAI |
2002 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #15 of 15 (100 per page; Change: )
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