| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Chung-Wen Huang, Wen-Li Shih, Chung-Ju Wu, Jia-Jhe Li, Jenq Kuen Lee |
Programming model and tools for embedded multicore systems.  |
IJES  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Yan, Wei Zhang 0002 |
Design and implementation of hybrid multicore simulators. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Victor Dumitriu, Lev Kirischian |
A framework of embedded reconfigurable systems based on re-locatable virtual components. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Nicolas Saint-Jean |
Run-time mapping for dynamic reconfiguration management in embedded systems. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco D. Santambrogio |
From reconfigurable architectures to self-adaptive autonomic systems. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali T. Alouani, Omar S. Elkeelany, Mohammed Abdallah |
Stand-alone portable digital body sound data acquisition device. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Pil Woo Chun, Lev Kirischian |
Architecture synthesis methodology for cost-effective run-time reconfigurable systems. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Geng-Cyuan Jheng, Dyi-Rong Duh, Cheng-Nan Lai |
Real-time reconfigurable cache for low-power embedded systems. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Pande, Joseph Zambreno |
Reconfigurable hardware implementation of a modified chaotic filter bank scheme. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Imran Rafiq Quadri, Huafeng Yu, Abdoulaye Gamatié, Éric Rutten, Samy Meftali, Jean-Luc Dekeyser |
Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun-Hsien Lu, Hsiao-Win Liao, Pao-Ann Hsiung |
Multi-objective placement of reconfigurable hardware tasks in real-time system. |
IJES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ozcan Ozturk, Mahmut T. Kandemir, Seung Woo Son, Ibrahim Kolcu |
Shared scratch pad memory space management across applications. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | C. Bruel |
If-conversion for embedded VLIW architectures. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhireesha Kudithipudi, Eugene John |
Implications of gated-Vss technique on leakage power in embedded caches. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin Palkovic, Henk Corporaal, Francky Catthoor |
Dealing with data dependent conditions to enable general global source code transformations. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Ciji Isen, Hari Angepat, Lizy K. John, Jung Pil Choi, Hyo Jung Song |
Embedded Java benchmark analysis on the ARM processor. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffry T. Russell, Margarida F. Jacome |
Program slicing across the hardware-software boundary for embedded systems. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Quan, Linwei Niu, Bren Mochocki, Xiaobo Sharon Hu |
Fixed-priority scheduling to reduce both the dynamic and leakage energy on variable voltage processors. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Poellabauer, Dinesh Rajan, Russell Zuck |
LD-DVS: load-aware dual-speed dynamic voltage scaling. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sankalita Saha, Vida Kianzad, Jason Schlessman, Gaurav Aggarwal, Shuvra S. Bhattacharyya, Rama Chellappa, Wayne Wolf |
An architectural level design methodology for smart camera applications. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Vibhore Vardhan, Wanghong Yuan, Albert F. Harris III, Sarita V. Adve, Robin Kravets, Klara Nahrstedt, Daniel Grobe Sachs, Douglas L. Jones |
GRACE-2: integrating fine-grained application adaptation with global adaptation for saving energy. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Enrico Bini, Claudio Scordino |
Optimal two-level speed assignment for real-time systems. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Cheng, Steve Goddard |
SYS-EDF: a system-wide energy-efficient scheduling algorithm for hard real-time systems. |
IJES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jong-eun Lee, Kiyoung Choi, Nikil Dutt |
Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Anne-Claire Guillou, Patrice Quinton, Tanguy Risset |
Hardware synthesis for systems of recurrence equations with multidimensional schedule. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhijie Jerry Shi, Xiao Yang, Ruby B. Lee |
Alternative application-specific processor architectures for fast arbitrary bit permutations. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum |
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle |
Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Herbert Bos, Bart Samwel, Mihai-Lucian Cristea, Kostas Anagnostakis |
Safe execution of untrusted applications on embedded network processors. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vikram Chandrasekhar, Frank Livingston, Joseph R. Cavallaro |
Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Andy D. Pimentel |
The Artemis workbench for system-level performance evaluation of embedded systems. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere |
Deriving efficient control in Process Networks with Compaan/Laura. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Terry Tao Ye, Giovanni De Micheli |
On-chip implementation of multiprocessor networks and switch fabrics. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vipul Gupta |
A cryptographic processor for arbitrary elliptic curves over GF(2m). |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | P. H. Chan, Jack Y. B. Lee |
An efficient disk-array-based server design for a multicast video streaming system. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Pablo Robelly, Gordon Cichon, H. Ahlendorf, Gerhard Fettweis |
A HW/SW design methodology for embedded SIMD vector signal processors. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Miquel Pericàs, Eduard Ayguadé, Javier Zalamea, Josep Llosa, Mateo Valero |
Power-efficient VLIW design using clustering and widening. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr |
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Thorsten Dräger, Gerhard Fettweis |
Application-specific permutation networks. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr |
Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Piia Saastamoinen, Ilkka Saastamoinen, Jari Nurmi |
Code compression in DSP processor systems. |
IJES |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chunling Hu, Daniel A. Jiménez, Ulrich Kremer |
An evaluation infrastructure for power and energy optimisations. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian W. Probst, Ulrich Kremer, Luca Benini, Peter Schelkens |
Power-aware computing systems. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir |
Design of power-aware FPGA fabrics. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jerry Hom, Ulrich Kremer |
Inter-program optimisations for disk energy reduction. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, Rami G. Melhem |
Power management in external memory using PA-CDRAM. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Giacomo Paci, Francesco Poletti, Luca Benini, Paul Marchal |
Exploring temperature-aware design in low-power MPSoCs. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Vasanth Venkatachalam, Michael Franz, Christian W. Probst |
A new way of estimating compute-boundedness and its application to dynamic voltage scaling. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest |
Energy-aware compilation and hardware design for VLIW embedded systems. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaurav Singh, Sandeep K. Shukla |
Algorithms for low power hardware synthesis from Concurrent Action Oriented Specifications (CAOS). |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthias Grumer, Christian Steger, Manuel Wendt, Andreas Mühlberger, Ulrich Neffe |
Horizontal and vertical HW/SW co-design flows for power aware smart card designs. |
IJES |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Yi Huang, Kuang-Li Huang, Yeh-Ching Chung |
Performance analysis of hard-real-time embedded software. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hanifa Boucheneb, Rachid Hadjidj |
Using inclusion abstraction to construct Atomic State Class Graphs for Time Petri Nets. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis |
System-level parallelism and concurrency maximisation in reconfigurable computing applications. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Frank Hannig, Hritam Dutta, Jürgen Teich |
Mapping a class of dependence algorithms to coarse-grained reconfigurable arrays: architectural parameters and methodology. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristinel Ababei, Kia Bazargan |
Non-contiguous linear placement for reconfigurable fabrics. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lui Sha, Chang-Gun Lee |
Real-time virtual machines for avionics software migration. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnakumar Balasubramanian, Arvind S. Krishna, Emre Turkay, Jaiganesh Balasubramanian, Jeff Parsons, Aniruddha S. Gokhale, Douglas C. Schmidt |
Applying model-driven development to distributed real-time and embedded avionics systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Alan G. Strelzoff |
Functional programming of real-time reconfigurable embedded systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lilian Bossuet, Guy Gogniat, Wayne Burleson |
Dynamically configurable security for SRAM FPGA bitstreams. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Klaus Danne, Christophe Bobda |
Dynamic reconfiguration of Distributed Arithmetic designs. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Borg, Andy J. Wellings |
Scoped, coarse-grain memory management and the RTSJ scoped memory model in the development of real-time applications. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric Vecchié, Robert de Simone |
Syntax-driven optimisations for reachable state space construction of ESTEREL programs. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh S. Dhodapkar, James E. Smith |
Tuning adaptive microarchitectures. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Mei-Ling Chiang, Ching-Ju Lo |
LyraFILE: a component-based VFAT file system for embedded systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jim Alves-Foss, Paul W. Oman, Carol Taylor, Scott Harrison |
The MILS architecture for high-assurance embedded systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Janusz A. Starzyk, Yongtao Guo, Zhineng Zhu |
Dynamically reconfigurable neuron architecture for the implementation of self-organising learning array. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Maya Gokhale, Paul Graham, Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins |
Dynamic reconfiguration for management of radiation-induced faults in FPGAs. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Albert Mo Kim Cheng |
A survey of formal verification methods and tools for embedded and real-time systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Dionisio de Niz, Raj Rajkumar |
Partitioning bin-packing algorithms for distributed real-time systems. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yosi Ben-Asher, Daniel Citron, Gadi Haber |
Overlapping memory operations with circuit evaluation in reconfigurable computing. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefan Ihmor, Wolfram Hardt |
Runtime reconfigurable interfaces: the RTR-IFB approach. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Ying Tseng |
The adaptive layer-based scheduling system for embedded real-time transmission on scalable multimedia stream. |
IJES |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez |
A reconfigurable processor for high speed point multiplication in elliptic curves. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir |
A methodology for validation of microprocessors using symbolic simulation. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Seppo Virtanen, Tero Nurmi, Jani Paakkulainen, Johan Lilius |
A system-level framework for designing and evaluating protocol processor architectures. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi |
A probabilistic analysis of fault tolerance for switch block array in FPGAs. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Ahmadinia, Christophe Bobda, Jürgen Teich |
Online placement for dynamically reconfigurable devices. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunsi Fei, Niraj K. Jha |
Integrated functional partitioning and synthesis for low power distributed systems of systems-on-a-chip. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Miroslav N. Velev, Randal E. Bryant |
TLSim and EVC: a term-level symbolic simulator and an efficient decision procedure for the logic of equality with uninterpreted functions and memories. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gabriella Kókai, Hans Holm Frühauf, Feng Xu |
Adaptive smart antennae receiver controlled by a hardware-based genetic optimiser. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Yuan Jan, Chih-Bin Fan, An-Chao Kuo, Wen-Chi Yen, Youn-Long Lin |
A platform based SOC design methodology and its application in image compression. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Heiko Kalte, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert |
A system approach for partially reconfigurable architectures. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo |
Improving Java performance using dynamic method migration on FPGAs. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek Jersak, Kai Richter, Rolf Ernst |
Performance analysis for complex embedded applications. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya |
Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Doris Ching, Patrick Schaumont, Ingrid Verbauwhede |
Integrated modelling and generation of a reconfigurable network-on-chip. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Hübner, Michael Ullmann, Jürgen Becker |
Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Manish Handa, Ranga Vemuri |
Hardware assisted two dimensional ultra fast online placement. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Lange, Martin Middendorf |
Multi task hyperreconfigurable architectures: models and reconfiguration problems. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jingzhao Ou, Seonil B. Choi, Viktor K. Prasanna |
Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Han Tsai, Chun-Nan Liu |
A hardware/software co-design case study on MPEG AAC audio decoder. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Iuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya |
ChronoSym: a new approach for fast and accurate SoC cosimulation. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson |
Developing large-scale field-programmable analog arrays for rapid prototyping. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin |
Symmetric encryption in reconfigurable and custom hardware. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Christophe Bobda |
CoreMap: a rapid prototyping environment for distributed reconfigurable systems. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Ullmann, Michael Hübner, Jürgen Becker |
On-demand FPGA run-time system for flexible and dynamical reconfiguration. |
IJES |
2005 |
DBLP DOI BibTeX RDF |
|
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