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Publications at "IOLTS"( http://dblp.L3S.de/Venues/IOLTS )

URL (DBLP): http://dblp.uni-trier.de/db/conf/iolts

Publication years (Num. hits)
2003 (47) 2004 (45) 2005 (67) 2006 (58) 2007 (59) 2008 (59) 2009 (54) 2010 (55) 2011 (58)
Publication types (Num. hits)
inproceedings(493) proceedings(9)
Venues (Conferences, Journals, ...)
IOLTS(502)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 39 occurrences of 34 keywords

Results
Found 502 publication records. Showing 502 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Rance Rodrigues, Sandip Kundu On graceful degradation of chip multiprocessors in presence of faults via flexible pooling of critical execution units. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Osnat Keren, Ilya Levin, Vladimir Sinelnikov Detection of Trojan HW by using hidden information on the system. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Valentin Gherman, Samuel Evain, Nathaniel Seymour, Yannick Bonhomme Generalized parity-check matrices for SEC-DED codes with fixed parity. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Rshdee Alhakim, Emmanuel Simeu, Kosai Raoof Internal model control for a self-tuning Delay-Locked Loop in UWB communication systems. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Daniel Sánchez, Yiannakis Sazeides, Juan L. Aragón, Joso M. Garcia An analytical model for the calculation of the Expected Miss Ratio in faulty caches. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jayaram Natarajan, Shreyas Sen, Abhijit Chatterjee Real time cross-layer adaptation for minimum energy wireless image transport using bit error rate control. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Aymen Fradi, Michael Nicolaidis, Lorena Anghel Memory BIST with address programmability. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Nivard Aymerich, A. Asenov, A. Brown, Ramon Canal, B. Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, P. Pouyan, Tanausu Ramirez, Antonio Rubio, I. Vatajelu, Xavier Vera, X. Wang, Paul Zuber New reliability mechanisms in memory design for sub-22nm technologies. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Gabriele Boschi, Riccardo Mariani, Stefano Lorenzini A verification strategy for fault-detection and fault-tolerance circuits. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Josef Haid A side channel attack countermeasure using system-on-chip power profile scrambling. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mikhail Baklashov An on-line memory state validation using shadow memory cloning. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1V. Prasanth, Virendra Singh, Rubin A. Parekhji Reduced overhead soft error mitigation using error control coding techniques. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Anna Vaskova, Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena Evaluation techniques for on-line testing of robust systems based on critical tasks distribution. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jorge O. M. Esteves, Tiago H. Moita, Carlos B. Almeida, Marcelino B. dos Santos ICT: Interface software for the characterization and test of mixed-signal power cores. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Aravind Rajendran, Yuriy Shiyanovskii, Frank Wolff, Christos A. Papachristou Noise margin, critical charge and power-delay tradeoffs for SRAM design. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Luke Pierce, Spyros Tragoudas Multi-level secure JTAG architecture. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Anna Vaskova, Celia López-Ongil, Enrique San Millán, Alejandro Jiménez-Horas, Luis Entrena Accelerating secure circuit design with hardware implementation of Diehard Battery of tests of randomness. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat Towards improved survivability in safety-critical systems. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Taiki Uemura, Takashi Kato, Hideya Matsuyama, Keiji Takahisa, Mitsuhiro Fukuda, Kichiji Hatanaka Investigation of multi cell upset in sequential logic and validity of redundancy technique. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides RVC-based time-predictable faulty caches for safety-critical systems. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yuriy Shiyanovskii, Aravind Rajendran, Christos A. Papachristou A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Seyab Khan, Said Hamdioui Modeling and mitigating NBTI in nanoscale circuits. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Cristiana Bolchini, Chiara Sandionigi, Luca Fossati, David Merodio Codinachs A reliable fault classifier for dependable systems on SRAM-based FPGAs. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Augustin, Michael Gössel, Rolf Kraemer Selective fault tolerance for finite state machines. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Taiga Takata, Yusuke Matsunaga A robust algorithm for pessimistic analysis of logic masking effects in combinational circuits. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Eberhard Böhl, Paul Duplys Fault attack resistant deterministic random bit generator usable for key randomization. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Tomoo Inoue, Hayato Henmi, Yuki Yoshikawa, Hideyuki Ichihara High-level synthesis for multi-cycle transient fault tolerant datapaths. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov Self-checking test circuits for latches and flip-flops. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Dan Alexandrescu A comprehensive soft error analysis methodology for SoCs/ASICs memory instances. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  BibTeX  RDF
1Navid Khoshavi, Hamid R. Zarandi, Mohammad Maghsoudloo Control-flow error recovery using commodity multi-core architecture features. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Fabien Chaix, Gilles Bizot, Michael Nicolaidis, Nacer-Eddine Zergainoh Variability-aware task mapping strategies for many-cores processor chips. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Rafal Baranowski, Hans-Joachim Wunderlich Fail-safety in core-based system design. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Sauer, V. Tomashevich, J. Muller, Matthew D. T. Lewis, A. Spilla, Ilia Polian, Bernd Becker, W. Burgard An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Rance Rodrigues, Sandip Kundu On graceful degradation of microprocessors in presence of faults via resource banking. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Dhiego Silva, Leticia Maria Veiras Bolzani, Fabian Vargas An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ingrid Verbauwhede The cost of cryptography: Is low budget possible? Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Sauer, Alejandro Czutro, Ilia Polian, Bernd Becker Estimation of component criticality in early design steps. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ronak Salamat, Hamid R. Zarandi Fault-tolerance assessment and enhancement in SoCWire interface: A system-on-chip wire. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Marco Paolieri, Riccardo Mariani Towards functional-safe timing-dependable real-time architectures. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Linder, Alfred Eder, Klaus Oberlönder, Martin Huch Variations of fault manifestation during Burn-In - A case study on industrial SRAM test results. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Zhen Wang, Mark G. Karpovsky Algebraic manipulation detection codes and their applications for design of secure cryptographic devices. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty A BIST scheme for testing and repair of multi-mode power switches. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael E. Imhof, Hans-Joachim Wunderlich Soft error correction in embedded storage elements. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Shusuke Yoshimoto, T. Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, H. Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1H. Grigoryan, Gurgen Harutunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian Generic BIST architecture for testing of content addressable memories. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Lilia Zaourar, Yann Kieffer, Arnaud Wenzel A multi-objective optimization for memory BIST sharing using a genetic algorithm. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Nahid Farhady Ghalaty, Mahdi Fazeli, Hossein Izadi Rad, Seyed Ghassem Miremadi Software-based control flow error detection and correction using branch triplication. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Berk Sunar Rise of the hardware Trojans. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Paolo Bernardi, Lyl M. Ciganda, Ernesto Sánchez, Matteo Sonza Reorda An effective methodology for on-line testing of embedded microprocessors. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Honorio Martin, Enrique San Millán, Luis Entrena, Julio César Hernández Castro, Pedro Peris-Lopez AKARI-X: A pseudorandom number generator for secure lightweight systems. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Cedric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache Loopback output router for reliable Network on Chip. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Kedar Karmarkar, Spyros Tragoudas Error correction encoding for multi-threshold capture mechanism. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Paolo Maistri Countermeasures against fault attacks: The good, the bad, and the ugly. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ronaldo Rodrigues Ferreira, Alvaro Freitas Moreira, Luigi Carro Matrix control-flow algorithm-based fault tolerance. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Enrico Costenaro, Massimo Violante, Dan Alexandrescu A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Neagu Madalin, Liviu Miclea, Joan Figueras Unidirectional error detection, localization and correction for DRAMs: Application to on-line DRAM repair strategies. Search on Bibsonomy IOLTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Samuel Evain, Yannick Bonhomme, Valentin Gherman Programmable restricted SEC codes to mask permanent faults in semiconductor memories. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira Predictive error detection by on-line aging monitoring. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Paolo Rech, Michelangelo Grosso, Fabio Melchiori, D. Loparco, Davide Appello, Luigi Dilillo, Alessandro Paccagnella, Matteo Sonza Reorda Analysis of root causes of alpha sensitivity variations on microprocessors manufactured using different cell layouts. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Martin Rozkovec, Jiri Jenícek, Ondrej Novák Application dependent FPGA testing method using compressed deterministic test vectors. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Tiago R. Balen, Marcelo Lubaszewski Radiation effects on programmable analog devices and mitigation techniques. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal 3D integration: Circuit design, test, and reliability challenges. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Seyab Khan, Said Hamdioui Temperature dependence of NBTI induced delay. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Claudia Rusu, Lorena Anghel, Dimiter Avresky RILM: Reconfigurable inter-layer routing mechanism for 3D multi-layer networks-on-chip. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1V. Prasanth, Virendra Singh, Rubin A. Parekhji Robust detection of soft errors using delayed capture methodology. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael Nicolaidis, Vladimir Pasca, Lorena Anghel Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Shyam Kumar Devarakond, Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Abhijit Chatterjee Built-in performance monitoring of mixed-signal/RF front ends using real-time parameter estimation. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Anna Vaskova, Celia López-Ongil, Alejandro Jiménez-Horas, Enrique San Millán, Luis Entrena Robust cryptographic ciphers with on-line statistical properties validation. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sebastiàn A. Bota, Gabriel Torrens, Bartomeu Alorda, J. Verd, Jaume Segura Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael G. Dimopoulos, Alexios Spyronasios, Alkis A. Hatzopoulos Wavelet analysis of measurements for on-line testing analog & mixed-signal circuits. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 5-7 July, 2010, Corfu, Greece Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  BibTeX  RDF
1Sreenivas Gangadhar, Spyros Tragoudas Probabilistic methods for the impact of an SET in combinational logic. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michel Agoyan, Jean-Max Dutertre, Amir-Pasha Mirbaha, David Naccache, Anne-Lise Ribotta, Assia Tria How to flip a bit? Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Salvatore Campagna, Massimo Violante A framework to support the design of COTS-based reliable space computers for on-board data handling. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Steffen Zeidler, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer On-line testing of bundled-data asynchronous handshake protocols. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Long Wang, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Arun Iyengar Checkpointing virtual machines against transient errors. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Paul Duplys, Eberhard Böhl, Wolfgang Rosenstiel Key randomization using a power analysis resistant deterministic random bit generator. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu Reconfigurable low-power Concurrent Error Detection in logic circuits. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy Selecting state variables for improved on-line testability through output response comparison of identical circuits. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michel Pignol, Florence Malou, Corinne Aicardi Qualification and relifing testing for space applications applied to the agilent G-Link components. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Yervant Zorian Test and reliability concerns for 3D-ICs. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Georgios Karakonstantis, Charles Augustine, Kaushik Roy A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Hyunbean Yi, Tomokazu Yoneda, Michiko Inoue, Yasuo Sato, Seiji Kajihara, Hideo Fujiwara Aging test strategy and adaptive test scheduling for SoC failure prediction. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Zhen Zhang, Alain Greiner, Mounir Benabdenbi Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael Augustin, Michael Gössel, Rolf Kraemer Reducing the area overhead of TMR-systems by protecting specific signals. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Piotr Gawkowski, Tomasz Rutkowski, Janusz Sosnowski Improving fault handling software techniques. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1A. Richardson Concepts for fault tolerant sensor systems. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis Evaluating transient-fault effects on traditional C-element's implementations. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Olivier Héron, Julien Guilhemsang, Nicolas Ventroux, Alain Giulieri Analysis of on-line self-testing policies for real-time embedded multiprocessors in DSM technologies. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael N. Skoufis, Spyros Tragoudas On-line detection of random voltage perturbations in buses with multiple-threshold receivers. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Ali Shahabi, S. Behdad Hosseini, Hasan Sohofi, Zainalabedin Navabi A partitioning approach to improve reconfigurable neuron-inspired online BIST. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Andreas Merentitis, D. Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos SBST for on-line detection of hard faults in multiprocessor applications under energy constraints. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1S. Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni Timing error tolerance in nanometer ICs. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi Configurable serial fault-tolerant link for communication in 3D integrated systems. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos A software-based self-test methodology for in-system testing of processor cache tag arrays. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Niccolò Battezzati, Davide Serrone, Massimo Violante A new framework for the automatic insertion of mitigation structures in circuits netlists. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Navid Farazmand, Masoud Zamani, Mehdi Baradaran Tahoori Online fault testing of reversible logic using dual rail coding. Search on Bibsonomy IOLTS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
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