| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Myung-Chul Kim, Dongjin Lee, Igor L. Markov |
SimPL: An Effective Placement Algorithm.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Johann Knechtel, Igor L. Markov, Jens Lienig |
Assembling 2-D Blocks Into 3-D Chips. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongjin Lee, Igor L. Markov |
Obstacle-Aware Clock-Tree Shaping During Placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov, Mehdi Saeedi |
Constant-Optimized Quantum Circuits for Modular Multiplication and Exponentiation |
CoRR |
2012 |
DBLP BibTeX RDF |
|
| 1 | Hadi Katebi, Karem A. Sakallah, Igor L. Markov |
Conflict Anticipation in the Search for Graph Automorphisms. |
LPAR |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Myung-Chul Kim, Natarajan Viswanathan, Charles J. Alpert, Igor L. Markov, Shyam Ramji |
MAPLE: multilevel adaptive placement for mixed-size designs. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Hong-Zu Chou, Igor L. Markov |
RTL analysis and modifications for improving at-speed test. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Tim Güneysu, Igor L. Markov, André Weimerskirch |
Securely Sealing Multi-FPGA Systems. |
ARC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongjin Lee, Igor L. Markov |
CONTANGO: Integrated Optimization of SoC Clock Networks. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov, Yaoyun Shi |
Constant-Degree Graph Expansions that Preserve Treewidth. |
Algorithmica |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | David A. Papa, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Natarajan Viswanathan, Gi-Joon Nam, Igor L. Markov |
Physical Synthesis with Clock-Network Optimization for Large Systems on Chips. |
IEEE Micro |
2011 |
DBLP DOI BibTeX RDF |
systems on chips, physical synthesis |
| 1 | Mehdi Saeedi, Igor L. Markov |
Synthesis and Optimization of Reversible Circuits - A Survey |
CoRR |
2011 |
DBLP BibTeX RDF |
|
| 1 | Fadi A. Aloul, Igor L. Markov, Arathi Ramani, Karem A. Sakallah |
Breaking Instance-Independent Symmetries In Exact Graph Coloring |
CoRR |
2011 |
DBLP BibTeX RDF |
|
| 1 | Igor L. Markov |
Getting Your Bits in Order. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov |
EDA: Synergy or sum of the parts? [review of "Electronic Design Automation: Synthesis, Verification and Test (Systems on Silicon" (Wang, L.-T., Eds., et al; 2009)]. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu |
VLSI Physical Design - From Graph Partitioning to Timing Closure. |
|
2011 |
DOI RDF |
|
| 1 | Dongjin Lee, Igor L. Markov |
Obstacle-aware clock-tree shaping during placement. |
ISPD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Johann Knechtel, Igor L. Markov, Jens Lienig |
Assembling 2D blocks into 3D chips. |
ISPD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongjin Lee, Igor L. Markov |
Multilevel tree fusion for robust clock networks. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov, Dongjin Lee |
Algorithmic tuning of clock trees and derived non-tree structures. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Myung-Chul Kim, Jin Hu, Dongjin Lee, Igor L. Markov |
A SimPLR method for routability-driven placement. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Valeria Bertacco, Igor L. Markov, Alan Mishchenko |
Logic synthesis and circuit customization using extensive external don't-cares. |
ACM Trans. Design Autom. Electr. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Shigeru Yamashita, Igor L. Markov |
Fast equivalence - checking for quantum circuits. |
Quantum Information & Computation |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov |
Ending Piracy of Integrated Circuits. |
IEEE Computer |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov |
Master numerical tasks with ease. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
EDA software, signal processing, numerical analysis |
| 1 | Igor L. Markov |
Chips in 3D. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David A. Papa, Michael D. Moffitt, Charles J. Alpert, Igor L. Markov |
Speeding Up Physical Synthesis with Transactional Timing Analysis. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jin Hu, Jarrod A. Roy, Igor L. Markov |
Completing high-quality global routes. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
global routing |
| 1 | Hadi Katebi, Karem A. Sakallah, Igor L. Markov |
Symmetry and Satisfiability: An Update. |
SAT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Raj R. Nadakuditi, Igor L. Markov |
On the costs and benefits of stochasticity in stream processing. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
latency, stochasticity, stream computing |
| 1 | Hadi Katebi, Igor L. Markov |
Large-scale Boolean matching. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Héctor J. Garcia, Igor L. Markov |
Spinto: High-performance energy minimization in spin glasses. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Dongjin Lee, Igor L. Markov |
Contango: Integrated optimization of SoC clock networks. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Myung-Chul Kim, Dongjin Lee, Igor L. Markov |
SimPL: An effective placement algorithm. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David A. Papa, Smita Krishnaswamy, Igor L. Markov |
SPIRE: A retiming-based physical-synthesis transformation system. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongjin Lee, Myung-Chul Kim, Igor L. Markov |
Low-power clock trees for CPUs. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes |
Signature-Based SER Analysis and Design of Logic Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek V. Shende, Igor L. Markov |
On the CNOT-cost of TOFFOLI gates. |
Quantum Information & Computation |
2009 |
DBLP BibTeX RDF |
|
| 1 | Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah |
Dynamic symmetry-breaking for Boolean satisfiability. |
Ann. Math. Artif. Intell. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov |
Book Review: A physical-design picture book. |
IEEE Design & Test of Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco |
Incremental Verification with Error Detection, Diagnosis, and Visualization. |
IEEE Design & Test of Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Aaron N. Ng, Rajat Aggarwal, Venky Ramachandran, Igor L. Markov |
Solving modern mixed-size placement instances. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | George F. Viamontes, Igor L. Markov, John P. Hayes |
Quantum Circuit Simulation. |
|
2009 |
DOI RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Functional Design Errors in Digital Circuits - Diagnosis, Correction and Repair |
|
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Smita Krishnaswamy, Igor L. Markov, John P. Hayes |
Improving testability and soft-error resilience through retiming. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
testability, soft errors, retiming |
| 1 | Kai-Hui Chang, Valeria Bertacco, Igor L. Markov |
Customizing IP cores for system-on-chip designs using extensive external don't-cares. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov |
CRISP: Congestion reduction by iterated spreading during placement. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jarrod A. Roy, David A. Papa, Igor L. Markov |
Fine Control of Local Whitespace in Placement. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Smita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes |
Probabilistic transfer matrices in symbolic reliability analysis of logic circuits. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
fault tolerance, Symbolic analysis |
| 1 | Michael D. Moffitt, Jarrod A. Roy, Igor L. Markov, Martha E. Pollack |
Constraint-driven floorplan repair. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
constraints, Floorplanning, legalization |
| 1 | David A. Papa, Tao Luo, Michael D. Moffitt, Chin-Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov |
RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Fixing Design Errors With Counterexamples and Resynthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Igor L. Markov |
High-Performance Routing at the Nanometer Scale. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Ketan N. Patel, Igor L. Markov, John P. Hayes |
Optimal synthesis of linear reversible circuits. |
Quantum Information & Computation |
2008 |
DBLP BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Automating Postsilicon Debugging and Repair. |
IEEE Computer |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov, Yaoyun Shi |
Simulating Quantum Computation by Contracting Tensor Networks. |
SIAM J. Comput. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
SafeResynth: A new technique for physical synthesis. |
Integration |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew A. Kennings, Igor L. Markov |
Circuit Placement. |
Encyclopedia of Algorithms |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael D. Moffitt, Jarrod A. Roy, Igor L. Markov |
The coming of age of (academic) global routing. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
optimization, routing, VLSI, benchmarks, computer-aided design, congestion, global routing, wirelength |
| 1 | David A. Papa, Tao Luo, Michael D. Moffitt, Chin-Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov |
RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
static timing analysis, timing-driven placement |
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Reap what you sow: spare cells for post-silicon metal fix. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
Optimizing non-monotonic interconnect using functional simulation and logic restructuring. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jin Hu, Jarrod A. Roy, Igor L. Markov |
Sidewinder: a scalable ILP-based router. |
SLIP |
2008 |
DBLP DOI BibTeX RDF |
integer linear programming, global routing |
| 1 | Paul T. Darga, Karem A. Sakallah, Igor L. Markov |
Faster symmetry discovery using sparsity of symmetries. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
partition refinement, model checking, symmetry, constraint satisfaction problems, Boolean satisfiability, sparsity, graph automorphism |
| 1 | Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov |
Protecting bus-based hardware IP by secret sharing. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
cryptography, manufacturing, integrated circuits, computer crime |
| 1 | Smita Krishnaswamy, Igor L. Markov, John P. Hayes |
On the role of timing masking in reliable logic circuit design. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
timing, soft errors, SEUs |
| 1 | Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov |
Circuit CAD Tools as a Security Threat. |
HOST |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
Random Stimulus Generation using Entropy and XOR Constraints. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov |
EPIC: Ending Piracy of Integrated Circuits. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw |
On the decreasing significance of large standard cells in technology mapping. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Postplacement rewiring by exhaustive search for functional symmetries. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
VLSI, placement, rewiring |
| 1 | Fadi A. Aloul, Arathi Ramani, Karem A. Sakallah, Igor L. Markov |
Solution and Optimization of Systems of Pseudo-Boolean Constraints. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
Pseudo Boolean (PB), Max-ONE, Global Routing, Conjunctive Normal Form (CNF), Backtrack Search, Integer Linear Programming (ILP), Max-SAT, Boolean Satisfiability (SAT) |
| 1 | Jarrod A. Roy, Igor L. Markov |
Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Igor L. Markov |
ECO-System: Embracing the Change in Placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Valeria Bertacco, Igor L. Markov |
Simulation-Based Bug Trace Minimization With BMC-Based Refinement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Igor L. Markov, Yaoyun Shi |
Constant-degree graph expansions that preserve the treewidth |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah |
Symmetry breaking for pseudo-Boolean formulas. |
ACM Journal of Experimental Algorithmics |
2007 |
DBLP DOI BibTeX RDF |
Graph automorphism |
| 1 | Smita Krishnaswamy, Igor L. Markov, John P. Hayes |
Tracking Uncertainty with Probabilistic Logic Circuit Testing. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
probabilistic faults, logic circuit testing, fault-modeling framework, test-vector sensitivity, integer linear programming |
| 1 | Igor L. Markov, Louis Scheffer, Dirk Stroobandt |
Special issue on System-Level Interconnect Prediction. |
Integration |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco |
InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Igor L. Markov |
ECO-system: Embracing the Change in Placement. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Fixing Design Errors with Counterexamples and Resynthesis. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
simulation-based verification, digital design errors, error-correction framework, resynthesis techniques, goal-directed search, entropy-guided search, counterexamples, digital designs, combinational equivalence-checking |
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Safe Delay Optimization for Physical Synthesis. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
safe delay optimization, SafeResynth, safe resynthesis technique, immediately-measurable delay improvement, circuit timing, route length, physical synthesis, electronic design automation, route congestion, circuit delay |
| 1 | Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Node Mergers in the Presence of Don't Cares. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | George F. Viamontes, Igor L. Markov, John P. Hayes |
Checking equivalence of quantum circuits and states. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jarrod A. Roy, Igor L. Markov |
High-performance routing at the nanometer scale. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Smita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes |
Enhancing design robustness with reliability-aware resynthesis and logic simulation. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
Automating post-silicon debugging and repair. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Fadi A. Aloul, Karem A. Sakallah, Igor L. Markov |
Efficient Symmetry Breaking for Boolean Satisfiability. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
clause learning, satisfiability (SAT), symmetries, conjunctive normal form (CNF), Backtrack Search, graph automorphism |
| 1 | Aditya K. Prasad, Vivek V. Shende, Igor L. Markov, John P. Hayes, Ketan N. Patel |
Data structures and algorithms for simplifying reversible circuits. |
JETC |
2006 |
DBLP DOI BibTeX RDF |
Circuit simplification, circuit libraries, optimal subcircuit |
| 1 | Jarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov |
Min-cut floorplacement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek V. Shende, Stephen S. Bullock, Igor L. Markov |
Synthesis of quantum-logic circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Krysta Marie Svore, Alfred V. Aho, Andrew W. Cross, Isaac L. Chuang, Igor L. Markov |
A Layered Software Architecture for Quantum Computing Design Tools. |
IEEE Computer |
2006 |
DBLP DOI BibTeX RDF |
EPR pair creation, Software architectures, Programming languages, Quantum computing, Design tools |
| 1 | Arathi Ramani, Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul |
Breaking Instance-Independent Symmetries In Exact Graph Coloring. |
J. Artif. Intell. Res. (JAIR) |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Saurabh N. Adya, Igor L. Markov, Paul G. Villarrubia |
On whitespace and stability in physical synthesis. |
Integration |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Aaron N. Ng, Igor L. Markov, Rajat Aggarwal, Venky Ramachandran |
Solving hard instances of floorplacement. |
ISPD |
2006 |
DBLP DOI BibTeX RDF |
floorplacement, benchmarks, placement, floorplanning, RTL, circuit layout |
| 1 | Jarrod A. Roy, David A. Papa, Aaron N. Ng, Igor L. Markov |
Satisfying whitespace requirements in top-down placement. |
ISPD |
2006 |
DBLP DOI BibTeX RDF |
placement, physical design, floorplanning |
| 1 | Jarrod A. Roy, James F. Lu, Igor L. Markov |
Seeing the forest and the trees: Steiner wirelength optimization in placemen. |
ISPD |
2006 |
DBLP DOI BibTeX RDF |
routing, placement, physical design, Steiner tree |
| 1 | Michael D. Moffitt, Aaron N. Ng, Igor L. Markov, Martha E. Pollack |
Constraint-driven floorplan repair. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
constraints, floorplanning, legalization |
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