|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 5 occurrences of 4 keywords
|
|
|
|
|
Results
Found 7 publication records. Showing 7 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jun Seomun, Insup Shin, Youngsoo Shin |
Synthesis of Active-Mode Power-Gating Circuits.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Insup Shin, Seungwhun Paik, Dongwan Shin, Youngsoo Shin |
HLS-dv: A High-Level Synthesis Framework for Dual-Vdd Architectures. |
IEEE Trans. VLSI Syst. |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Donkyu Baek, Insup Shin, Seungwhun Paik, Youngsoo Shin |
Selectively patterned masks: Structured ASIC with asymptotically ASIC performance. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Seungwhun Paik, Insup Shin, Taewhan Kim, Youngsoo Shin |
HLS-l: A High-Level Synthesis Framework for Latch-Based Architectures. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Seomun, Insup Shin, Youngsoo Shin |
Synthesis and implementation of active mode power gating circuits. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
active leakage, active-mode power gating, low power |
| 1 | Insup Shin, Seungwhun Paik, Youngsoo Shin |
Register allocation for high-level synthesis using dual supply voltages. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
low power, high-level synthesis, register allocation, dual supply voltage |
| 1 | Seungwhun Paik, Insup Shin, Youngsoo Shin |
HLS-l: High-level synthesis of high performance latch-based circuits. |
DATE |
2009 |
DBLP BibTeX RDF |
|
Displaying result #1 - #7 of 7 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")