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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1 occurrences of 1 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jinhui Wang, Ioannis Savidis, Eby G. Friedman |
Thermal analysis of oxide-confined VCSEL arrays.  |
Microelectronics Journal  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Vasilis F. Pavlidis, Ioannis Savidis, Eby G. Friedman |
Clock Distribution Networks in 3-D Integrated Systems. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman |
Clock distribution models of 3-D integrated systems. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Ioannis Savidis, Syed M. Alam, Ankur Jain, Scott Pozder, Robert E. Jones, Ritwik Chatterjee |
Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits. |
Microelectronics Journal |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu, Michael C. Huang, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore |
An intra-chip free-space optical interconnect. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
free-space optical interconnect, intra-chip, 3d |
| 1 | Ioannis Savidis, Eby G. Friedman |
Electrical modeling and characterization of 3-D vias. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
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