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Publications of "Jürgen Becker" ( http://dblp.L3S.de/Authors/Jürgen_Becker )

URL (Homepage):  http://www.itiv.kit.edu/21_53.php  Author page on DBLP  Author page in RDF  Community of Jürgen Becker in ASPL-2

Publication years (Num. hits)
1994-1997 (16) 1998-2000 (22) 2001-2003 (16) 2004 (15) 2005 (16) 2006 (22) 2007 (19) 2008 (28) 2009 (19) 2010 (23) 2011 (48) 2012 (27) 2013 (5)
Publication types (Num. hits)
article(40) book(1) incollection(4) inproceedings(217) phdthesis(1) proceedings(13)
Venues (Conferences, Journals, ...)
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The graphs summarize 69 occurrences of 44 keywords

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Found 276 publication records. Showing 276 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Nikolaos S. Voros, Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma, Arnaud Grasset, Paul Brelet, Philippe Bonnot, Fabio Campi, Eberhard Schüler, Henning Sahlbach, Sean Whitty, Rolf Ernst, Enrico Billich, Claudia Tischendorf, Ulrich Heinkel, Frank Ieromnimon, Dimitrios Kritharidis, Axel Schneider, Joachim Knäblein, Wolfram Putzke-Röming MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems. Search on Bibsonomy ACM Trans. Embedded Comput. Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1René Cumplido, Peter Athanas, Jürgen Becker Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011). Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Oliver Sander, Alexander Klimm, Jürgen Becker Hardware Support for Authentication in Cyber Physical Systems. Search on Bibsonomy it - Information Technology The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Ali Azarian, João M. P. Cardoso, Stephan Werner, Jürgen Becker An FPGA-based multi-core approach for pipelining computing stages. Search on Bibsonomy SAC The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Cuong Pham-Quoc, Jan Heisswolf, Stephan Werner, Zaid Al-Ars, Jürgen Becker, Koen Bertels Hybrid interconnect design for heterogeneous hardware accelerators. Search on Bibsonomy DATE The full citation details ... 2013 DBLP  BibTeX  RDF
1David Hillerkuss, Rene Schmogrow, Matthias Meyer, Stefan Wolf, Meinert Jordan, Philipp Kleinow, Nicole Lindenmann, Philipp C. Schindler, Argishti Melikyan, Xin Yang, Shalva Ben-Ezra, Bernd Nebendahl, Michael Dreschmann, Joachim Meyer, Francesca Parmigiani, Periklis Petropoulos, Bojan Resan, Aandreas Oehler, Kurt Weingarten, Lars Altenhain, Tobias Ellermeyer, Matthias Moeller, Michael Hübner, Jürgen Becker, Christian Koos, Wolfgang Freude, Juerg Leuthold Single-laser 32.5 Tbit/s Nyquist WDM transmission Search on Bibsonomy CoRR The full citation details ... 2012 DBLP  BibTeX  RDF
1Diana Göhringer, Lukas Meder, Stephan Werner, Oliver Oey, Jürgen Becker, Michael Hübner Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Christoph Roth, Joachim Meyer, Michael Rückauer, Oliver Sander, Jürgen Becker Efficient Execution of Networked MPSoC Models by Exploiting Multiple Platform Levels. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Oliver Sander, Benjamin Glas, Lars Braun, Klaus D. Müller-Glaser, Jürgen Becker Exploration of Uninitialized Configuration Memory Space for Intrinsic Identification of Xilinx Virtex-5 FPGA Devices. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Matthias Kühnle, André Wagner, Alisson Vasconcelos De Brito, Jürgen Becker Modeling and Implementation of a Power Estimation Methodology for SystemC. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Alexander Thomas, Michael Rückauer, Jürgen Becker HoneyComb: An Application-Driven Online Adaptive Reconfigurable Hardware Architecture. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Diana Göhringer, Carsten Tradowsky, Jörg Henkel, Jürgen Becker Adaptive processor architecture - invited paper. Search on Bibsonomy ICSAMOS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hübner, Jürgen Becker, Sébastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures. Search on Bibsonomy ICSAMOS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas From Scilab to multicore embedded systems: Algorithms and methodologies. Search on Bibsonomy ICSAMOS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Giulio Corradi, Romuald Girardey, Jürgen Becker Xilinx tools facilitate development of FPGA applications for IEC61508. Search on Bibsonomy AHS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Max Ferger, Muhammed Al Kadi, Michael Hübner, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Gabriel Marchesan Almeida, José Rodrigo Azambuja, Jürgen Becker Hardware / Software Virtualization for the Reconfigurable Multicore Platform. Search on Bibsonomy CSE The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Jordy Potman, Kim Sunesen, Steven Derrien, Olivier Sentieys, Jürgen Becker A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems. Search on Bibsonomy CSE The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Oliver Oey, Stephan Werner, Diana Göhringer, Andreas Stuckert, Jürgen Becker, Michael Hübner Virtualization of heterogeneous and adaptive multi-core/multi-board systems. Search on Bibsonomy DASIP The full citation details ... 2012 DBLP  BibTeX  RDF
1Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Menard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach. Search on Bibsonomy DSD The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jan Heisswolf, Ralf König, Jürgen Becker A Scalable NoC Router Design Providing QoS Support Using Weighted Round Robin Scheduling. Search on Bibsonomy ISPA The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker On Dynamic Run-time Processor Pipeline Reconfiguration. Search on Bibsonomy IPDPS Workshops The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jürgen Becker, Jinian Bian, Christophe Bobda, René Cumplido, Michael Hübner RAW Introduction. Search on Bibsonomy IPDPS Workshops The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Timo Stripf, Ralf König, Patrick Rieder, Jürgen Becker A Compiler Back-End for Reconfigurable, Mixed-ISA Processors with Clustered Register Files. Search on Bibsonomy IPDPS Workshops The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. Search on Bibsonomy IPDPS Workshops The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Jürgen Becker, Stephanie Friederich, Jan Heisswolf, Ralf König, David May Hardware prototyping of novel invasive multicore architectures. Search on Bibsonomy ASP-DAC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture. Search on Bibsonomy SIES The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Timo Stripf, Ralf König, Jürgen Becker A cycle-approximate, mixed-ISA simulator for the KAHRISMA architecture. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1Stephan Werner, Oliver Oey, Diana Göhringer, Michael Hübner, Jürgen Becker Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1Christoph Schmutzler, Martin Simons, Jürgen Becker On demand dependent deactivation of automotive ECUs. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1Carsten Tradowsky, Enrique Cordero, Thorsten Deuser, Michael Hübner, Jürgen Becker Determination of on-chip temperature gradients on reconfigurable hardware. Search on Bibsonomy ReConFig The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Matthias Birk, Matthias Balzer, Nicole V. Ruiter, Jürgen Becker Comparison of processing performance and architectural efficiency metrics for FPGAs and GPUs in 3D Ultrasound Computer Tomography. Search on Bibsonomy ReConFig The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Menard, Olivier Sentieys, Diana Göhringer, Thomas Perschke A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. Search on Bibsonomy ReCoSoC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker Operating System for Runtime Reconfigurable Multiprocessor Systems. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Christian Schuck, Bastian Haetzer, Jürgen Becker Reconfiguration Techniques for Self-X Power and Performance Management on Xilinx Virtex-II/Virtex-II-Pro FPGAs. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Birk, Clemens Hagner, Matthias Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Jonathan Obie, André L. S. Braga, Michael Hübner, Carlos Humberto Llanos Quintero, Jürgen Becker Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Benjamin Glas, Oliver Sander, Vitali Stuckert, Klaus D. Müller-Glaser, Jürgen Becker Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Jürgen Becker, Loïc Lagadec, Gilles Sassatelli Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC' 2010). Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Aravind Dasu, João M. P. Cardoso, Eli Bozorgzadeh, Jürgen Becker Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010). Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexander Klimm, Benjamin Glas, Matthias Wachs, Sebastian Vogel, Klaus D. Müller-Glaser, Jürgen Becker A Security Scheme for Dependable Key Insertion in Mobile Embedded Devices. Search on Bibsonomy Int. J. Reconfig. Comp. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Jürgen Becker (eds.) Multiprocessor System-on-Chip - Hardware Design and Tool Integration. Search on Bibsonomy 2011 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Jürgen Becker Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support. Search on Bibsonomy Multiprocessor System-on-Chip The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Thomas Ebi, David Kramer, Christian Schuck, Alexander von Renteln, Jürgen Becker, Uwe Brinkschulte, Jörg Henkel, Wolfgang Karl DodOrg - A Self-adaptive Organic Many-core Architecture. Search on Bibsonomy Organic Computing The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Oliver Oey, Michael Hübner, Jürgen Becker Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip. Search on Bibsonomy ICSAMOS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Timo Stripf, Ralf König, Jürgen Becker A novel ADL-based compiler-centric software framework for reconfigurable mixed-ISA processors. Search on Bibsonomy ICSAMOS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker Architecture design space exploration of run-time scalable issue-width processors. Search on Bibsonomy ICSAMOS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Joachim Meyer, Juanjo Noguera, Michael Hübner, Rodney Stewart, Jürgen Becker Embedded Systems Start-Up under Timing Constraints on Modern FPGAs. Search on Bibsonomy FPL The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Stephan Werner, Michael Hübner, Jürgen Becker RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC. Search on Bibsonomy FPL The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Monica Magalhães Pereira, Lars Braun, Michael Hübner, Jürgen Becker, Luigi Carro Run-time resource instantiation for fault tolerance in FPGAs. Search on Bibsonomy AHS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Peter Figuli, Michael Hübner, Romuald Girardey, Falco Bapp, Thomas Bruckschlögl, Florian Thoma, Jörg Henkel, Jürgen Becker A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion. Search on Bibsonomy AHS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Kühnle, Alisson Vasconcelos De Brito, Christoph Roth, Konstantinos Dagas, Jürgen Becker The Study of a Dynamic Reconfiguration Manager for Systems-on-Chip. Search on Bibsonomy ISVLSI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Francisco Mendoza, Christian Köllner, Jürgen Becker, Klaus D. Müller-Glaser An automated approach to SystemC/Simulink co-simulation. Search on Bibsonomy International Symposium on Rapid System Prototyping The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Birk, Alexander Guth, Michael Zapf, Matthias Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing. Search on Bibsonomy DASIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Natalie Frietsch, I. Pashkovskiy, Gert F. Trommer, Lars Braun, Matthias Birk, Michael Hübner, Jürgen Becker Development of a method for image-based motion estimation of a VTOL-MAV on FPGA. Search on Bibsonomy DASIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Kühnle, André Wagner, Jürgen Becker A statistical power estimation methodology embedded in a SystemC code translator. Search on Bibsonomy SBCCI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexander Thomas, Michael Rückauer, Jürgen Becker HoneyComb: an application-driven online adaptive reconfigurable hardware architecture. Search on Bibsonomy SBCCI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Antonio Carlos Cavalcanti, Elmar U. K. Melcher, Jürgen Becker (eds.) 24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 02, 2011 Search on Bibsonomy SBCCI The full citation details ... 2011 DBLP  BibTeX  RDF
1Christoph Roth, Oliver Sander, Jürgen Becker Flexible and efficient co-simulation of networked embedded devices. Search on Bibsonomy SBCCI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1José Rodrigo Azambuja, Samuel Pagliarini, Mauricio Altieri, Fernanda Lima Kastensmidt, Michael Hübner, Jürgen Becker Using dynamic partial reconfiguration to detect sees in microprocessors through non-intrusive hybrid technique. Search on Bibsonomy SBCCI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jürgen Becker, Marcelo O. Johann, Ricardo Reis (eds.) VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers Search on Bibsonomy VLSI-SoC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, K. Siozios, Jürgen Becker A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexander Klimm, Sebastian Vogel, Jürgen Becker Hyperelliptic Curve Cryptoarchitecture for Fast Execution of Schnorr and Okamoto Authentication Protocols. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jürgen Becker, Pascal Benoit, René Cumplido RAW Introduction. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker A Scalable Microarchitecture Design that Enables Dynamic Code Execution for Variable-Issue Clustered Processors. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Christoph Roth, Gabriel Marchesan Almeida, Oliver Sander, Luciano Ost, Nicolas Hebert, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Jürgen Becker Modular Framework for Multi-level Multi-device MPSoC Simulation. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Christian Schuck, Bastian Haetzer, Michael Hübner, Jürgen Becker Online Routing of FPGA Clock Networks for Module Relocation in Partial Reconfigurable Multi Clock Designs. Search on Bibsonomy IPDPS Workshops The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Christoph Roth, Oliver Sander, Matthias Kühnle, Jürgen Becker HLA-based simulation environment for distributed SystemC simulation. Search on Bibsonomy SimuTools The full citation details ... 2011 DBLP  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Jürgen Becker (eds.) 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011 Search on Bibsonomy MARC Symposium The full citation details ... 2011 DBLP  BibTeX  RDF
1Florian Thoma, Michael Hübner, Diana Göhringer, Hasam Ümitcan Yilmaz, Jürgen Becker Power and performance optimization through MPI supported dynamic voltage and frequency scaling. Search on Bibsonomy MARC Symposium The full citation details ... 2011 DBLP  BibTeX  RDF
1Waheed Ahmed, Muhammad Shafique, Lars Bauer, Manuel Hammerich, Jörg Henkel, Jürgen Becker Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors. Search on Bibsonomy FCCM The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexander von Renteln, Uwe Brinkschulte, David Kramer, Wolfgang Karl, Christian Schuck, Jürgen Becker Digital On-demand Computing Organism - Interaction between Monitoring and Middleware. Search on Bibsonomy ISORC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Joachim Meyer, Juanjo Noguera, Michael Hübner, Lars Braun, Oliver Sander, R. M. Gil, Rodney Stewart, Jürgen Becker Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration. Search on Bibsonomy DATE The full citation details ... 2011 DBLP  BibTeX  RDF
1Matthias Rümmele-Werner, Thomas Perschke, Lars Braun, Michael Hübner, Jürgen Becker A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker. Search on Bibsonomy ISCAS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Carsten Tradowsky, Diana Göhringer, Lars Braun, Florian Thoma, Jörg Henkel, Jürgen Becker Dynamic Processor Reconfiguration. Search on Bibsonomy ReConFig The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Peter M. Athanas, Jürgen Becker, René Cumplido (eds.) 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011 Search on Bibsonomy ReConFig The full citation details ... 2011 DBLP  BibTeX  RDF
1Diana Göhringer, Lukas Meder, Michael Hübner, Jürgen Becker Adaptive Multi-client Network-on-Chip Memory. Search on Bibsonomy ReConFig The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Alexander Thomas, Michael Rückauer, Jürgen Becker HoneyComb: A multi-grained dynamically reconfigurable runtime adaptive hardware architecture. Search on Bibsonomy SoCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Matthias Kühnle, Alisson Vasconcelos De Brito, Christoph Roth, Matthias Krüsselin, Jürgen Becker An approach for power and performance evaluation of reconfigurable SoC at mixed abstraction levels. Search on Bibsonomy ReCoSoC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Nadine Dahm, Michael Hübner, Jürgen Becker Approach of an FPGA based adaptive stepper motor control system. Search on Bibsonomy ReCoSoC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mahtab Niknahad, Oliver Sander, Jürgen Becker A study on fine granular fault tolerance methodologies for FPGAs. Search on Bibsonomy ReCoSoC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Roger Woods, Jürgen Becker, Peter Athanas, Fearghal Morgan Guest Editorial ARC 2009. Search on Bibsonomy TRETS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems. Search on Bibsonomy TRETS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Michael Ullmann, Klaus D. Müller-Glaser, Jürgen Becker Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies. Search on Bibsonomy Dynamically Reconfigurable Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Alexander Thomas, Jürgen Becker Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns. Search on Bibsonomy Dynamically Reconfigurable Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Laure Hugot-Derville, Jürgen Becker Message Passing Interface support for the runtime adaptive multi-processor system-on-chip RAMPSoC. Search on Bibsonomy ICSAMOS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael Dreschmann, Michael Hübner, Moritz Roger, Oliver Sander, Christos Klamouris, Jürgen Becker, Wolfgang Freude, Juerg Leuthold Reconfigurable Hardware for Power-over-Fiber Applications. Search on Bibsonomy FPL The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Mahtab Niknahad, Michael Hübner, Jürgen Becker Reliability Analysis and Improvement in Nano Scale Design. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Romuald Girardey, Michael Hübner, Jürgen Becker Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Lars Braun, Jürgen Becker Two-Dimensional Dynamic Multigrained Reconfigurable Hardware. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Jürgen Becker FPGA-Based Runtime Adaptive Multiprocessor Approach for Embedded High Performance Computing Applications. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Joachim Meyer, Oliver Sander, Lars Braun, Jürgen Becker, Juanjo Noguera, Rodney Stewart Fast Sequential FPGA Startup Based on Partial and Dynamic Reconfiguration. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Romuald Girardey, Michael Hübner, Jürgen Becker Mixed-Signal Diverse Redundant System for Safety Critical Applications in FPGA. Search on Bibsonomy ISVLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Michael Hübner, Diana Göhringer, Juanjo Noguera, Jürgen Becker Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs. Search on Bibsonomy IPDPS Workshops The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Jürgen Becker High performance reconfigurable multi-processor-based computing on FPGAs. Search on Bibsonomy IPDPS Workshops The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jürgen Becker, Eli Bozorgzadeh, João M. P. Cardoso, Aravind Dasu Welcome message. Search on Bibsonomy IPDPS Workshops The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker CAP-OS: Operating system for runtime scheduling, task mapping and resource management on reconfigurable multiprocessor architectures. Search on Bibsonomy IPDPS Workshops The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip. Search on Bibsonomy FCCM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only). Search on Bibsonomy FPGA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF designflow, toolchain, fpga, partitioning, reconfigurable computing, mpsoc, hardware/software co-design
1Ralf König, Lars Bauer, Timo Stripf, Muhammad Shafique, Waheed Ahmed, Jürgen Becker, Jörg Henkel KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  BibTeX  RDF
1Matthias Traub, Thilo Streichert, Oleg Krasovytskyy, Jürgen Becker Scenario extraction for a refined timing-analysis of automotive network topologies. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  BibTeX  RDF
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