Search results for "J. Gregory Steffan"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, J. Gregory Steffan	Multi-ported memories for FPGAs via XOR.	FPGA	2012	DBLP DOI BibTeX RDF
1	Chuck (Chengyan) Zhao, J. Gregory Steffan, Cristiana Amza, Allan Kielstra	Compiler Support for Fine-Grain Software-Only Checkpointing.	CC	2012	DBLP DOI BibTeX RDF
1	Charles Eric LaForest, John Gregory Steffan	OCTAVO: an FPGA-centric processor family.	FPGA	2012	DBLP DOI BibTeX RDF
1	Jeffrey Kingyens, J. Gregory Steffan	The Potential for a GPU-Like Overlay Architecture for FPGAs.	Int. J. Reconfig. Comp.	2011	DBLP DOI BibTeX RDF
1	Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan	Application-specific signatures for transactional memory in soft processors.	TRETS	2011	DBLP DOI BibTeX RDF
1	Danyao Wang, Natalie D. Enright Jerger, J. Gregory Steffan	DART: A programmable architecture for NoC simulation on FPGAs.	NOCS	2011	DBLP BibTeX RDF
1	Martin Labrecque, J. Gregory Steffan	NetTM: faster and easier synchronization for soft multicores via transactional memory.	FPGA	2011	DBLP DOI BibTeX RDF
1	Mark C. Jeffrey, J. Gregory Steffan	Understanding bloom filter intersection for lazy address-set disambiguation.	SPAA	2011	DBLP DOI BibTeX RDF
1	Andreas Moshovos, J. Gregory Steffan, Kim M. Hazelwood, David R. Kaeli (eds.)	Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010	CGO	2010	DBLP BibTeX RDF
1	Steven Birk, J. Gregory Steffan, Jason Helge Anderson	Parallelizing FPGA placement using Transactional Memory.	FPT	2010	DBLP DOI BibTeX RDF
1	Jeffrey Kingyens, J. Gregory Steffan	A GPU-inspired soft processor for high-throughput acceleration.	IPDPS Workshops	2010	DBLP DOI BibTeX RDF
1	Martin Labrecque, J. Gregory Steffan	The case for hardware transactional memory in software packet processing.	ANCS	2010	DBLP DOI BibTeX RDF
1	Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan	Caliper: a tool to generate precise and closed-loop traffic.	SIGCOMM	2010	DBLP DOI BibTeX RDF	traffic generation, soft processors, netfpga
1	Charles Eric LaForest, J. Gregory Steffan	Efficient multi-ported memories for FPGAs.	FPGA	2010	DBLP DOI BibTeX RDF	fpga, parallel, memory, multi-port
1	Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan	Application-Specific Signatures for Transactional Memory in Soft Processors.	ARC	2010	DBLP DOI BibTeX RDF
1	Clark Verbrugge, J. Gregory Steffan, Mark G. Stoodley, Kit Barton, Ondrej Lhoták	9th Workshop on Compiler-Driven Performance.	CASCON	2010	DBLP DOI BibTeX RDF
1	Martin Labrecque, J. Gregory Steffan	Fast critical sections via thread scheduling for FPGA-based multithreaded processors.	FPL	2009	DBLP DOI BibTeX RDF
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	Data parallel FPGA workloads: Software versus hardware.	FPL	2009	DBLP DOI BibTeX RDF
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	Fine-grain performance scaling of soft vector processors.	CASES	2009	DBLP DOI BibTeX RDF	VESPA, soft vector processor, viram, FPGA, custom, SIMD, vector, ASIP, microarchitecture, application specific, soft processor
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	Soft vector processors vs FPGA custom hardware: measuring and reducing the gap.	FPGA	2009	DBLP DOI BibTeX RDF	eembc, soft, viram, fpga, adaptable, vector, data parallel, processor, simd
1	Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry	Compiler and hardware support for reducing the synchronization of speculative threads.	TACO	2008	DBLP DOI BibTeX RDF	automatic parallelization, instruction scheduling, Thread-level speculation, chip-multiprocessing
1	Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry	Incrementally parallelizing database transactions with thread-level speculation.	ACM Trans. Comput. Syst.	2008	DBLP DOI BibTeX RDF	incremental parallelization, Thread-level speculation, chip-multiprocessing, optimistic concurrency
1	Mihai Burcea, J. Gregory Steffan, Cristiana Amza	The potential for variable-granularity access tracking for optimistic parallelism.	MSPC	2008	DBLP DOI BibTeX RDF	dependence tracking, variable granularity, transactional memory, thread-level speculation
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	VESPA: portable, scalable, and flexible FPGA-based vector processors.	CASES	2008	DBLP DOI BibTeX RDF	SPREE, VESPA, VIRAM, FPGA, custom, SIMD, vector, ASIP, microarchitecture, application specific, soft processor
1	Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan	Scaling Soft Processor Systems.	FCCM	2008	DBLP DOI BibTeX RDF
1	Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan	Custom code generation for soft processors.	SIGARCH Computer Architecture News	2007	DBLP DOI BibTeX RDF
1	Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry	CMP Support for Large and Dependent Speculative Threads.	IEEE Trans. Parallel Distrib. Syst.	2007	DBLP DOI BibTeX RDF	databases, Multiprocessor Systems, cache coherence, thread-level speculation
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	Exploration and Customization of FPGA-Based Soft Processors.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Martin Labrecque, J. Gregory Steffan	Improving Pipelined Soft Processors with Multithreading.	FPL	2007	DBLP DOI BibTeX RDF
1	Marek Olszewski, Jeremy Cutler, J. Gregory Steffan	JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory.	PACT	2007	DBLP DOI BibTeX RDF
1	Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry	Tolerating Dependences Between Large Speculative Threads Via Sub-Threads.	ISCA	2006	DBLP DOI BibTeX RDF
1	Jeff Da Silva, J. Gregory Steffan	A probabilistic pointer analysis for speculative optimizations.	ASPLOS	2006	DBLP DOI BibTeX RDF	speculative optimization, dependence analysis, pointer analysis
1	Stanley L. C. Fung, J. Gregory Steffan	Improving cache locality for thread-level speculation.	IPDPS	2006	DBLP DOI BibTeX RDF
1	Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose	Application-specific customization of soft processor microarchitecture.	FPGA	2006	DBLP DOI BibTeX RDF	Nios, RTL generation, SPREE, FPGA, customization, embedded processor, ASIP, microarchitecture, application specific, soft processor
1	J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry	The STAMPede approach to thread-level speculation.	ACM Trans. Comput. Syst.	2005	DBLP DOI BibTeX RDF	cache coherence, automatic parallelization, Thread-level speculation, chip-multiprocessing
1	Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan	The microarchitecture of FPGA-based soft processors.	CASES	2005	DBLP DOI BibTeX RDF	Nios, RTL generation, SPREE, application specic tradeoff, FPGA, pipeline, exploration, embedded processor, ASIP, microarchitecture, soft processor
1	Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry	Optimistic Intra-Transaction Parallelism on Chip Multiprocessors.	VLDB	2005	DBLP BibTeX RDF
1	Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry	Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads.	CGO	2004	DBLP DOI BibTeX RDF
1	Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry	Compiler optimization of scalar value communication between speculative threads.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry	Improving Value Communication for Thread-Level Speculation.	HPCA	2002	DBLP DOI BibTeX RDF	parallelization, multithreaded, Speculation, value prediction
1	J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry	A scalable approach to thread-level speculation.	ISCA	2000	DBLP DOI BibTeX RDF
1	J. Gregory Steffan, Todd C. Mowry	The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization.	HPCA	1998	DBLP DOI BibTeX RDF

Publications of J. Gregory Steffan John Gregory Steffan ( http://dblp.L3S.de/Authors/J._Gregory_Steffan )