Search results for "Ja Chun Ku"

Found 13 publication records. Showing 13 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail	SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	Area Optimization for Leakage Reduction and Thermal Stability in Nanometer-Scale Technologies.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	On the Scaling of Temperature-Dependent Effects.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail	Thermal Management of On-Chip Caches Through Power Density Minimization.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	Thermal-Aware Methodology for Repeater Insertion in Low-Power VLSI Circuits.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Serkan Ozdemir, Arindam Mallik, Ja Chun Ku, Gokhan Memik, Yehea I. Ismail	Variable latency caches for nanoscale processor.	SC	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	Thermal-aware methodology for repeater insertion in low-power VLSI circuits.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power design, repeater insertion, temperature-aware design
1	Ja Chun Ku, Yehea I. Ismail	A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Yehea I. Ismail	Attaining Thermal Integrity in Nanometer Chips.	ISCAS	2007	DBLP DOI BibTeX RDF
1	Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail	A self-adjusting clock tree architecture to cope with temperature variations.	ICCAD	2007	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail	Power density minimization for highly-associative caches in embedded processors.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	cache, embedded processor, leakage power, temperature
1	Ja Chun Ku, Yehea I. Ismail	Area optimization for leakage reduction and thermal stability in nanometer scale technologies.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail	Thermal Management of On-Chip Caches Through Power Density Minimization.	MICRO	2005	DBLP DOI BibTeX RDF

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Publications of "Ja Chun Ku" ( http://dblp.L3S.de/Authors/Ja_Chun_Ku )