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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 59 occurrences of 39 keywords
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Results
Found 62 publication records. Showing 62 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Angelo Kuti Lusala, Jean-Didier Legat |
Combining SDM-Based Circuit Switching with Packet Switching in a Router for On-Chip Networks.  |
Int. J. Reconfig. Comp.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Julien De Vos, Cédric Hocquet, Francois Botman, François Durvaux, Sarah Boyd, Denis Flandre, Jean-Didier Legat |
A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes. |
ISSCC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert |
Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65 nm AES coprocessor for passive RFID tags. |
J. Cryptographic Engineering |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelo Kuti Lusala, Jean-Didier Legat |
Combining sdm-based circuit switching with packet switching in a NoC for real-time applications. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Vergeylen, Angelo Kuti Lusala, Jean-Didier Legat |
A new mechanism to reduce congestion on TDM networks-on-chips. |
ReCoSoC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelo Kuti Lusala, Jean-Didier Legat |
A SDM-TDM based circuit-switched router for on-chip networks. |
ReCoSoC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Denis Flandre, Jean-Didier Legat |
Nanometer MOSFET Effects on the Minimum-Energy Point of Sub-45nm Subthreshold Logic---Mitigation at Technology and Circuit Levels. |
ACM Trans. Design Autom. Electr. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilham Hassoune, Denis Flandre, Ian O'Connor, Jean-Didier Legat |
ULPFA: A New Efficient Design of a Power-Aware Full Adder. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Bertrand Rousseau, Philippe Manet, Igor Loiselle, Jean-Didier Legat, Hans Vandierendonck |
A methodology for precise comparisons of processor core architectures for homogeneous many-core DSP platforms. |
DASIP |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Cédric Hocquet, Denis Flandre, Jean-Didier Legat |
Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelo Kuti Lusala, Jean-Didier Legat |
Combining circuit and packet switching with bus architecture in a NoC for real-time applications. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelo Kuti Lusala, Jean-Didier Legat |
A Hybrid Router Combining SDM-Based Circuit Swictching with Packet Switching for On-chip Networks. |
ReConFig |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat |
Interests and Limitations of Technology Scaling for Subthreshold Logic. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Lotfi Guedria, Damien Hubaux, Mathieu Ocãna, Jean-Didier Legat |
Flexible embedded system for sensor integration and custom data processing in an automotive application. |
IWCMC |
2009 |
DBLP DOI BibTeX RDF |
driver coaching, soft-core, vehicle monitoring, FPGA, GPS, flexibility, automotive system, FMS, CAN bus |
| 1 | David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat |
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
short-channel effects, subthreshold logic, variability, cmos digital integrated circuits, ultra-low power, gate leakage |
| 1 | David Bol, Denis Flandre, Jean-Didier Legat |
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
adaptive circuits, subthreshold logic, variability, CMOS digital integrated circuits, ultra-low power |
| 1 | Philippe Manet, Daniel Maufroid, Leonardo Tosi, Grégory Gailliard, Olivier Mulertt, Marco Di Ciano, Jean-Didier Legat, Denis Aulagnier, Christian Gamrat, Raffaele Liberati, Vincenzo La Barba, Pol Cuvelier, Bertrand Rousseau, Paul Gelineau |
An Evaluation of Dynamic Partial Reconfiguration for Signal and Image Processing in Professional Electronics Applications. |
EURASIP J. Emb. Sys. |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat |
Impact of Technology Scaling on Digital Subthreshold Circuits. |
ISVLSI |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Renaud Ambroise, Denis Flandre, Jean-Didier Legat |
Analysis and minimization of practical energy in 45nm subthreshold logic circuits. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | David Bol, Ilham Hassoune, David Levacq, Denis Flandre, Jean-Didier Legat |
Efficient Multiple-Valued Signed-Digit Full Adder Based on NDR MOS Structures and its Application to an N-bit Current-Mode Constant-Time Adder. |
Multiple-Valued Logic and Soft Computing |
2007 |
DBLP BibTeX RDF |
|
| 1 | Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat |
Dynamic differential self-timed logic families for robust and low-power security ICs. |
Integration |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Angelo Kuti Lusala, Philippe Manet, Bertrand Rousseau, Jean-Didier Legat |
NoC Implementation in FPGA Using Torus Topology. |
FPL |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Vandierendonck, Philippe Manet, Thibault Delavallee, Igor Loiselle, Jean-Didier Legat |
By-passing the out-of-order execution pipeline to increase energy-efficiency. |
Conf. Computing Frontiers |
2007 |
DBLP DOI BibTeX RDF |
instruction wake-up, energy-efficiency, instruction scheduling, out-of-order execution |
| 1 | Bertrand Rousseau, Philippe Manet, D. Galerin, D. Merkenbreack, Jean-Didier Legat, F. Dedeken, Yves Gabriel |
Enabling certification for dynamic partial reconfiguration using a minimal flow. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippe Manet, Daniel Maufroid, Leonardo Tosi, Marco Di Ciano, Olivier Mulertt, Yves Gabriel, Jean-Didier Legat, Denis Aulagnier, Christian Gamrat, Raffaele Liberati, Vincenzo La Barba |
Interactive presentation: RECOPS: reconfiguring programmable devices for military hardware electronics. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
high speed I/O, FPGA, reconfiguration, reconfigurable computing, dynamic reconfiguration, partial reconfiguration, military, defense |
| 1 | Philippe Manet, Renaud Ambroise, David Bol, Marc Baltus, Jean-Didier Legat |
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications. |
J. Low Power Electronics |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilham Hassoune, François Macé, Denis Flandre, Jean-Didier Legat |
Low-swing current mode logic (LSCML): A new logic style for secure and robust smart cards against power analysis attacks. |
Microelectronics Journal |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Antonin Descampe, François-Olivier Devaux, Gaël Rouvroy, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq |
A Flexible Hardware JPEG 2000 Decoder for Digital Cinema. |
IEEE Trans. Circuits Syst. Video Techn. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Guerric Meurice de Dormale, Renaud Ambroise, David Bol, Jean-Jacques Quisquater, Jean-Didier Legat |
Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards. |
ASAP |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans Vandierendonck, Philippe Manet, Jean-Didier Legat |
Application-specific reconfigurable XOR-indexing to eliminate cache conflict misses. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippe Manet, David Bol, Renaud Ambroise, Jean-Didier Legat |
Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | François Macé, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
A Design Methodology for Secured ICs Using Dynamic Current Mode Logic. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
Differential Pull Down Networks, Side-channel attack, Differential Power Analysis, Binary Decision Diagrams |
| 1 | François-Xavier Standaert, Frédéric Lefèbvre, Gaël Rouvroy, Benoit M. Macq, Jean-Jacques Quisquater, Jean-Didier Legat |
Practical Evaluation of a Radial Soft Hash Algorithm. |
ITCC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ilham Hassoune, Amaury Nève, Jean-Didier Legat, Denis Flandre |
Investigation of Low-Power Low-Voltage Circuit Techniques for a Hybrid Full-Adder Cell. |
PATMOS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | François-Xavier Standaert, Gilles Piret, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat |
ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware. |
FSE |
2004 |
DBLP DOI BibTeX RDF |
block cipher design, side-channel resistance, reconfigurable hardware, efficient implementations |
| 1 | Gaël Rouvroy, François-Xavier Standaert, Frédéric Lefèbvre, Jean-Jacques Quisquater, Benoit M. Macq, Jean-Didier Legat |
Reconfigurable hardware solutions for the digital rights management of digital cinema. |
Digital Rights Management Workshop |
2004 |
DBLP DOI BibTeX RDF |
FPGA, watermarking, AES, DRM, JPEG 2000, digital cinema |
| 1 | Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Compact and Efficient Encryption/Decryption Module for FPGA Implementation of the AES Rijndael Very Well Suited for Small Embedded Applications. |
ITCC |
2004 |
DBLP DOI BibTeX RDF |
compact encryption/decryption implementation, FPGA, Cryptography, AES, DES |
| 1 | Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Efficient Uses of FPGAs for Implementations of DES and Its Experimental Linear Cryptanalysis. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
FPGA, Cryptography, DES, linear cryptanalysis, efficient implementations |
| 1 | Grégory Dillen, Benoît Georis, Olivier Cantineau, Jean-Didier Legat |
Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000. |
IEEE Trans. Circuits Syst. Video Techn. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Elias N. Malamas, Euripides G. M. Petrakis, Michalis E. Zervakis, Laurent Petit, Jean-Didier Legat |
A survey on industrial vision systems, applications, tools. |
Image Vision Comput. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
FPGA, cryptography, design methodology, DES, efficient implementations |
| 1 | Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Efficient FPGA Implementation of Block Cipher MISTY1. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat |
A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL. |
FPGA |
2003 |
DBLP DOI BibTeX RDF |
AES RIJNDAEL, high encryption rates, FPGA, cryptography, reconfigurable hardware |
| 1 | Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat |
Design strategies and modified descriptions to optimize cipher FPGA implementations: fast and compact results for DES and triple-DES. |
FPGA |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat |
Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs. |
CHES |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | François Koeune, Gaël Rouvroy, François-Xavier Standaert, Jean-Jacques Quisquater, Jean-Pierre David, Jean-Didier Legat |
An FPGA Implementation of the Linear Cryptanalysis. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Jacques Quisquater, François-Xavier Standaert, Gaël Rouvroy, Jean-Pierre David, Jean-Didier Legat |
A Cryptanalytic Time-Memory Tradeoff: First FPGA Implementation. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | François-Xavier Standaert, Gaël Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat |
A Time-Memory Tradeoff Using Distinguished Points: New Analysis & FPGA Results. |
CHES |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Pierre David, Tony Postiau, Paul Fisette, Jean-Didier Legat |
Implementation of very large dataflow graphs on a reconfigurable architecture for robotic applications. |
IPDPS |
2001 |
DBLP BibTeX RDF |
|
| 1 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq |
A Graph-Oriented Task Manager for Small Multiprocessor Systems. |
Euro-Par |
1999 |
DBLP DOI BibTeX RDF |
parallelism, synchronization, multiprocessors, dependence graph |
| 1 | Tanguy Gilmont, Jean-Didier Legat, Jean-Jacques Quisquater |
Enhancing Security in the Memory Management Unit. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Xavier Verians, Jean-Didier Legat, Jean-Jacques Quisquater, Benoit M. Macq |
A New Parallelism Management Scheme for Multiprocessor Systems. |
ACPC |
1999 |
DBLP DOI BibTeX RDF |
parallelism, multiprocessors, task scheduling, task graph |
| 1 | C. Amerijckx, Michel Verleysen, Philippe Thissen, Jean-Didier Legat |
Image compression by self-organized Kohonen map. |
IEEE Transactions on Neural Networks |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Olivier Cantineau, Laurent Petit, Jean-Didier Legat |
Architecture of a Memory Manager for an MPEG-2 Video Decoding Circuit. |
VLSI Signal Processing |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Pierre David, Jean-Didier Legat |
A Data-Flow Oriented Co-Design for Reconfigurable Systems. (PDF / PS) |
International Workshop on Rapid System Prototyping |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Olivier Cantineau, Jean-Didier Legat |
Efficient Parallelisation of an MPEG-2 Codec on a TMS320C80 Video Processor. |
ICIP |
1998 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Voz, Michel Verleysen, Philippe Thissen, Jean-Didier Legat |
Suboptimal Bayesian classification by vector quantization with small clusters. |
ESANN |
1995 |
DBLP BibTeX RDF |
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| 1 | Jean-Luc Voz, Michel Verleysen, Philippe Thissen, Jean-Didier Legat |
A Practical View of Suboptimal Bayesian Classification with Radial Gaussian Kernels. |
IWANN |
1995 |
DBLP DOI BibTeX RDF |
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| 1 | Philippe Thissen, Michel Verleysen, Jean-Didier Legat, Jordi Madrenas, Jordi Domínguez |
A VLSI System for Neural Bayesian and LVQ Classification. |
IWANN |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippe Thissen, Michel Verleysen, Jean-Didier Legat |
An Associative Processor Dedicated to Classification by Neural Methods. |
IWANN |
1995 |
DBLP DOI BibTeX RDF |
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| 1 | Michel Verleysen, Philippe Thissen, Jean-Didier Legat |
Optimal decision surfaces in LVQ1 classiffication of patterns. |
ESANN |
1993 |
DBLP BibTeX RDF |
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| 1 | Michel Verleysen, Philippe Thissen, Jean-Didier Legat |
Linear Vector Classification: An Improvement on LVQ Algorithms to Create Classes of Patterns. |
IWANN |
1993 |
DBLP DOI BibTeX RDF |
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