|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 33 occurrences of 11 keywords
|
|
|
|
|
Results
Found 44 publication records. Showing 44 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Nuray At, Jean-Luc Beuchat, Ismail San |
Compact Implementation of Threefish and Skein on FPGA.  |
IACR Cryptology ePrint Archive  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Diego F. Aranha, Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals |
Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves. |
CT-RSA |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez |
Fast Architectures for the \eta_T Pairing over Small-Characteristic Supersingular Elliptic Curves. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki |
A Low-Area Unified Hardware Architecture for the AES and the Cryptographic Hash Function ECHO. |
IACR Cryptology ePrint Archive |
2011 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki |
A low-area unified hardware architecture for the AES and the cryptographic hash function ECHO. |
J. Cryptographic Engineering |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki |
A Compact FPGA Implementation of the SHA-3 Candidate ECHO. |
IACR Cryptology ePrint Archive |
2010 |
DBLP BibTeX RDF |
|
| 1 | Diego F. Aranha, Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals |
Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves. |
IACR Cryptology ePrint Archive |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki |
Compact Implementations of BLAKE-32 and BLAKE-64 on FPGA. |
IACR Cryptology ePrint Archive |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jorge Enrique González-Díaz, Shigeo Mitsunari, Eiji Okamoto, Francisco Rodríguez-Henríquez, Tadanori Teruya |
High-Speed Software Implementation of the Optimal Ate Pairing over Barreto-Naehrig Curves. |
IACR Cryptology ePrint Archive |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto |
FPGA and ASIC implementations of the etaT pairing in characteristic three. |
Computers & Electrical Engineering |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eiji Okamoto, Teppei Yamazaki |
Compact implementations of BLAKE-32 and BLAKE-64 on FPGA. |
FPT |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jorge Enrique González-Díaz, Shigeo Mitsunari, Eiji Okamoto, Francisco Rodríguez-Henríquez, Tadanori Teruya |
High-Speed Software Implementation of the Optimal Ate Pairing over Barreto-Naehrig Curves. |
Pairing |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez |
Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves. |
IACR Cryptology ePrint Archive |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez |
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. |
IACR Cryptology ePrint Archive |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez |
Fast Architectures for the etaT Pairing over Small-Characteristic Supersingular Elliptic Curves. |
IACR Cryptology ePrint Archive |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez |
Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves. |
CANS |
2009 |
DBLP DOI BibTeX RDF |
supersingular curve, multi-core, Tate pairing, finite field arithmetic, ? T pairing |
| 1 | Jean-Luc Beuchat, Jérémie Detrey, Nicolas Estibals, Eiji Okamoto, Francisco Rodríguez-Henríquez |
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers. |
CHES |
2009 |
DBLP DOI BibTeX RDF |
Karatsuba-Ofman multiplier, FPGA, elliptic curve, hardware accelerator, Tate pairing, finite field arithmetic, ? T pairing |
| 1 | Jean-Luc Beuchat, Jean-Michel Muller |
Automatic Generation of Modular Multipliers for FPGA Applications. |
IEEE Trans. Computers |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Masaaki Shirase, Tsuyoshi Takagi |
Algorithms and Arithmetic Operators for Computing the etaT Pairing in Characteristic Three. |
IEEE Trans. Computers |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Francisco Rodríguez-Henríquez |
A Comparison Between Hardware Accelerators for the Modified Tate Pairing over F2m and F3m. |
IACR Cryptology ePrint Archive |
2008 |
DBLP BibTeX RDF |
|
| 1 | Nidia Cortez-Duarte, Francisco Rodríguez-Henríquez, Jean-Luc Beuchat, Eiji Okamoto |
A Pipelined Karatsuba-Ofman Multiplier over GF($3^{97}$) Amenable for Pairing Computation. |
IACR Cryptology ePrint Archive |
2008 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto |
FPGA and ASIC Implementations of the etaT Pairing in Characteristic Three. |
IACR Cryptology ePrint Archive |
2008 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Francisco Rodríguez-Henríquez |
A Comparison between Hardware Accelerators for the Modified Tate Pairing over F2m and F3m. |
Pairing |
2008 |
DBLP DOI BibTeX RDF |
Modified Tate pairing, reduced ? T pairing, FPGA, elliptic curve, hardware accelerator, finite field arithmetic |
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto |
A Coprocessor for the Final Exponentiation of the etaT Pairing in Characteristic Three. |
IACR Cryptology ePrint Archive |
2007 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto |
Arithmetic Operators for Pairing-Based Cryptography. |
IACR Cryptology ePrint Archive |
2007 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto, Masaaki Shirase, Tsuyoshi Takagi |
Algorithms and Arithmetic Operators for Computing the etaT Pairing in Characteristic Three. |
IACR Cryptology ePrint Archive |
2007 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto |
A Refined Algorithm for the etaT Pairing Calculation in Characteristic Three. |
IACR Cryptology ePrint Archive |
2007 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat |
Further Comments on ``Residue-to-Binary Converters Based on New Chinese Remainder Theorems'' |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto |
A Coprocessor for the Final Exponentiation of the eta T Pairing in Characteristic Three. |
WAIFI |
2007 |
DBLP DOI BibTeX RDF |
final exponentiation, FPGA, hardware accelerator, ? T pairing, characteristic three |
| 1 | Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto |
Arithmetic Operators for Pairing-Based Cryptography. |
CHES |
2007 |
DBLP DOI BibTeX RDF |
FPGA, elliptic curve, hardware accelerator, finite field arithmetic, ? T pairing |
| 1 | Jean-Luc Beuchat, Takanori Miyoshi, Yoshihito Oyama, Eiji Okamoto |
Multiplication over Fpm on FPGA: A Survey. |
ARC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto |
An Algorithm for the nt Pairing Calculation in Characteristic Three and its Hardware Implementation. |
IEEE Symposium on Computer Arithmetic |
2007 |
DBLP DOI BibTeX RDF |
nT pairing, FPGA, elliptic curve, hardware accelerator, Tate pairing, characteristic three |
| 1 | Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, Eiji Okamoto |
An Algorithm for the ηT Pairing Calculation in Characteristic Three and its Hardware Implementation. |
IACR Cryptology ePrint Archive |
2006 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jean-Michel Muller |
Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement. |
ASAP |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Arnaud Tisserand |
Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA. |
Technique et Science Informatiques |
2004 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat |
FPGA Implementations of the RC6 Block Cipher. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat |
Some Modular Adders and Multipliers for Field Programmable Gate Arrays. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
modulo m addition, modulo m multiplication, FPGA, Computer arithmetic |
| 1 | Jean-Luc Beuchat, Jacques-Olivier Haenni, Héctor Fabio Restrepo, Christof Teuscher, Francesco J. Gómez, Eduardo Sanchez |
Approches matérielles et logicielles de l'algorithme de chiffrement IDEA. |
Technique et Science Informatiques |
2002 |
DBLP BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Arnaud Tisserand |
Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Sanchez, Moshe Sipper, Jacques-Olivier Haenni, Jean-Luc Beuchat, André Stauffer, Andrés Pérez-Uribe |
Static and Dynamic Configurable Systems. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
static configurability, FPGAs, Configurable computing, dynamic configurability |
| 1 | Jean-Luc Beuchat, Eduardo Sanchez |
An On-Line Arithmetic-Based Reconfigurable Neuroprocessor. |
IPPS/SPDP Workshops |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Eduardo Sanchez |
Using On-Line Arithmetic and Reconfiguration for Neuroprocessor Implementations. |
IWANN |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Beuchat, Jacques-Olivier Haenni, Eduardo Sanchez |
Hardware Reconfigurable Neural Networks. |
IPPS/SPDP Workshops |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Jacques-Olivier Haenni, Jean-Luc Beuchat, Eduardo Sanchez |
RENCO: A Reconfigurable Network Computer. |
FCCM |
1998 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #44 of 44 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")