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Publications of "Jen-Ming Wu" ( http://dblp.L3S.de/Authors/Jen-Ming_Wu )

  Author page on DBLP  Author page in RDF  Community of Jen-Ming Wu in ASPL-2

Publication years (Num. hits)
2005-2011 (15) 2012 (1)
Publication types (Num. hits)
article(2) inproceedings(14)
Venues (Conferences, Journals, ...)
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The graphs summarize 4 occurrences of 4 keywords

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Found 16 publication records. Showing 16 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Ching-Te Chiu, Yu-Hao Hsu, Jen-Ming Wu, Shuo-Hung Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Yarsun Hsu An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking. Search on Bibsonomy Signal Processing Systems The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Yu-Hao Hsu, Yang-Syu Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Fanta Chen, Min-Sheng Kao, Wei-Chih Lai, Yarsun Hsu A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology. Search on Bibsonomy ASP-DAC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Che-Chen Chou, Jen-Ming Wu Low Complexity MIMO Precoder Design with LDLH Channel Decomposition. Search on Bibsonomy ICC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit. Search on Bibsonomy ISCAS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Wei-Yu Tsai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu A novel MUX-FF circuit for low power and high speed serial link interfaces. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Chih-Hsing Lin, Yung-Chang Chang, Wen-Chih Huang, Wei-Chih Lai, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Chun-Ming Huang, Chih-Chyau Yang, Shih-Lun Chen A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Yu-Hao Hsu, Yang-Syu Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Fanta Chen, Min-Sheng Kao, Yarsun Hsu A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology. Search on Bibsonomy ISCAS The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Min-Sheng Kao, Jen-Ming Wu, Chih-Hsing Lin, Fanta Chen, Ching-Te Chiu, Shawn S. H. Hsu A 10-Gb/s CML I/O Circuit for Backplane Interconnection in 0.18- $\mu$ m CMOS Technology. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Che-Chen Chou, Hsi-Chei Chen, Jen-Ming Wu A low complexity channel decomposition and feedback strategy for MIMO precoder design. Search on Bibsonomy ICASSP The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Ci-Ye Tso, Jen-Ming Wu, Pangan Ting Iterative Interference Cancellation for STBC-OFDM Systems in Fast Fading Channels. Search on Bibsonomy GLOBECOM The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Fanta Chen, Jen-Ming Wu An Extended Phase Detector 2.56/3.2Gb/s Clock And Data Recovery Design with Digitally Assisted Lock Detector. Search on Bibsonomy ISCAS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Yu-Hao Hsu, Ming-Hao Lu, Ping-Ling Yang, Fanta Chen, You-Hung Li, Min-Sheng Kao, Chih-Hsing Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology. Search on Bibsonomy ISCAS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces. Search on Bibsonomy ASP-DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Birkhoff-von Neumann symmetric TDM switch IC, SERDES interfaces, load-balanced TDM switch IC, digital TDM switch, 8B10B CODEC, analog SERDES I/O interfaces, dual-mode SERDES, half-rate architectures, all static CMOS gates, wide-band CML buffer, PMOS active load scheme, 20 Gbit/s, high speed networking, CMOS technology, low power consumption, 0.18 micron
1Ching-Te Chiu, Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Jen-Ming Wu, Wen-Bin Lin Channel Estimation for Non-Line-of-Sight WiMax Communication System. Search on Bibsonomy VTC Spring The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Ching-Te Chiu, Chun-Chieh Chang, Shih-Min Chen, Hou-Cheng Tzeng, Ming-Chang Du, Yu-Ho Hsu, Jen-Ming Wu, Kai-Ming Feng A 20 Gbps Scalable Load-Balanced TDM Switch with CODEC for High Speed Networking Applications. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
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