Search results for "John Paul Shen"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Carlos Madriles, Carlos García Quiñones, F. Jesús Sánchez, Pedro Marcuello, Antonio González, Dean M. Tullsen, Hong Wang 0003, John Paul Shen	Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices.	IEEE Trans. Parallel Distrib. Syst.	2008	DBLP DOI BibTeX RDF	Speculative thread level parallelism, pre-computation slices, thread partitioning, multi-core architecture
1	Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan Rakvic, Hong Wang 0003, John Paul Shen	Multiple Instruction Stream Processor.	ISCA	2006	DBLP DOI BibTeX RDF
1	John Paul Shen, Margaret Martonosi (eds.)	Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006	ASPLOS	2006	DBLP BibTeX RDF
1	Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Pat Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb	Die Stacking (3D) Microarchitecture.	MICRO	2006	DBLP DOI BibTeX RDF
1	Murali Annavaram, Ed Grochowski, John Paul Shen	Mitigating Amdahl's Law through EPI Throttling.	ISCA	2005	DBLP DOI BibTeX RDF
1	Satish Narayanasamy, Hong Wang 0003, Perry H. Wang, John Paul Shen, Brad Calder	A Dependency Chain Clustered Microarchitecture.	IPDPS	2005	DBLP DOI BibTeX RDF
1	Partha Kundu, Murali Annavaram, Trung A. Diep, John Paul Shen	A case for shared instruction cache on chip multiprocessors running OLTP.	SIGARCH Computer Architecture News	2004	DBLP DOI BibTeX RDF
1	Perry H. Wang, Jamison D. Collins, Hong Wang 0003, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen	Helper Threads via Virtual Multithreading.	IEEE Micro	2004	DBLP DOI BibTeX RDF
1	Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang 0003, Donald Yeung, Milind Girkar, John Paul Shen	Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors.	CGO	2004	DBLP DOI BibTeX RDF
1	Perry H. Wang, Jamison D. Collins, Hong Wang 0003, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen	Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform.	ASPLOS	2004	DBLP DOI BibTeX RDF	DB2 database, cache miss prefetching, itanium processor, switch-on-event, multithreading, helper thread, PAL
1	Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang 0003, John Paul Shen	Hardware Support for Prescient Instruction Prefetch.	HPCA	2004	DBLP DOI BibTeX RDF
1	Ed Grochowski, Ronny Ronen, John Paul Shen, Hong Wang 0003	Best of Both Latency and Throughput.	ICCD	2004	DBLP DOI BibTeX RDF
1	Richard A. Hankins, Trung A. Diep, Murali Annavaram, Brian Hirano, Harald Eri, Hubert Nueckel, John Paul Shen	Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice.	MICRO	2003	DBLP DOI BibTeX RDF
1	Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang 0003, John Paul Shen	A framework for modeling and optimization of prescient instruction prefetch.	SIGMETRICS	2003	DBLP DOI BibTeX RDF	optimization, multithreading, analytical modeling, path expressions, helper threads, instruction prefetch
1	Shih-Wei Liao, Perry H. Wang, Hong Wang 0003, John Paul Shen, Gerolf Hoflehner, Daniel M. Lavery	Post-Pass Binary Adaptation for Software-Based Speculative Precomputation.	PLDI	2002	DBLP DOI BibTeX RDF	chaining speculative precomputation, dependence reduction, long-range thread-based prefetching, loop rotation, post-pass, scheduling, prediction, slicing, speculation, triggering, pointer, slack, delay minimization
1	R. David Weldon, Steven S. Chang, Hong Wang 0003, Gerolf Hoflehner, Perry H. Wang, Daniel M. Lavery, John Paul Shen	Quantitative Evaluation of the Register Stack Engine and Optimizations for Future Itanium Processors.	Interaction between Compilers and Computer Architectures	2002	DBLP DOI BibTeX RDF
1	Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul Shen	Non-Vital Loads.	HPCA	2002	DBLP DOI BibTeX RDF
1	Perry H. Wang, Hong Wang 0003, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen	Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.	HPCA	2002	DBLP DOI BibTeX RDF
1	Murali Annavaram, Trung A. Diep, John Paul Shen	Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors.	ICCD	2002	DBLP DOI BibTeX RDF
1	Jamison D. Collins, Hong Wang 0003, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen	Speculative precomputation: long-range prefetching of delinquent loads.	ISCA	2001	DBLP DOI BibTeX RDF	Systems Application Architecture
1	Jamison D. Collins, Dean M. Tullsen, Hong Wang 0003, John Paul Shen	Dynamic speculative precomputation.	MICRO	2001	DBLP DOI BibTeX RDF
1	Perry H. Wang, Hong Wang 0003, Ralph-Michael Kling, Kalpana Ramakrishnan, John Paul Shen	Register Renaming and Scheduling for Dynamic Execution of Predicated Code.	HPCA	2001	DBLP DOI BibTeX RDF
1	John Paul Shen	Clear and Present Tensions in Microprocessor Design.	ICCD	2001	DBLP BibTeX RDF
1	Deepak Limaye, Ryan Rakvic, John Paul Shen	Parallel Cachelets.	ICCD	2001	DBLP BibTeX RDF
1	Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen	A Buffer-Oriented Methodology for Microarchitecture Validation.	J. Electronic Testing	2000	DBLP DOI BibTeX RDF	processor validation, superscalar microarchitecture, design validation
1	Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen	Effectiveness of Microarchitecture Test Program Generation.	IEEE Design & Test of Computers	2000	DBLP DOI BibTeX RDF
1	Yuan C. Chou, John Paul Shen	Instruction path coprocessors.	ISCA	2000	DBLP DOI BibTeX RDF
1	Ryan Rakvic, Bryan Black, John Paul Shen	Completion time multiple branch prediction for enhancing trace cache performance.	ISCA	2000	DBLP DOI BibTeX RDF
1	Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen	PipeRench implementation of the instruction path coprocessor.	MICRO	2000	DBLP DOI BibTeX RDF
1	Jonathan Combs, Candice Bechem Combs, John Paul Shen	Mispredicted Path Cache Effects.	Euro-Par	1999	DBLP DOI BibTeX RDF
1	Bryan Black, Bohuslav Rychlik, John Paul Shen	The Block-Based Trace Cache.	ISCA	1999	DBLP DOI BibTeX RDF
1	Yuan C. Chou, Jason Fung, John Paul Shen	Reducing branch misprediction penalties via dynamic control independence detection.	International Conference on Supercomputing	1999	DBLP DOI BibTeX RDF
1	Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen	Superscalar Processor Validation at the Microarchitecture Level.	VLSI Design	1999	DBLP DOI BibTeX RDF
1	Alexander G. Dean, John Paul Shen	System-Level Issues for Software Thread Integration: Guest Triggering and Host Selection. (PDF / PS)	IEEE Real-Time Systems Symposium	1999	DBLP DOI BibTeX RDF	Thread Integration, Real-time Systems, Embedded Systems, Compilers, Multithreading, Hardware to Software Migration
1	Mikko H. Lipasti, John Paul Shen	Exploiting Value Locality to Exceed the Dataflow Limit.	International Journal of Parallel Programming	1998	DBLP DOI BibTeX RDF
1	Bryan Black, John Paul Shen	Calibration of Microprocessor Performance Models.	IEEE Computer	1998	DBLP DOI BibTeX RDF
1	Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen	Efficacy and Performance Impact of Value Prediction.	IEEE PACT	1998	DBLP DOI BibTeX RDF	usefulness tracking, instruction level parallelism, speculative execution, superscalar processor, value prediction, hybrid predictor
1	Bryan Black, Brian Mueller, Stephanie Postal, Ryan Rakvic, Noppanunt Utamaphethai, John Paul Shen	Load Execution Latency Reduction.	International Conference on Supercomputing	1998	DBLP DOI BibTeX RDF	load address prediction, load execution, load/store alias, speculative execution, value prediction
1	Alexander G. Dean, John Paul Shen	Techniques for Software Thread Integration in Real-Time Embedded Systems. (PDF / PS)	IEEE Real-Time Systems Symposium	1998	DBLP DOI BibTeX RDF
1	Alexander G. Dean, John Paul Shen	Hardware to Software Migration with Real-Time Thread Integration.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Chris J. Newburn, John Paul Shen	Post-pass partitioning of signal processing programs.	International Journal of Parallel Programming	1997	DBLP DOI BibTeX RDF
1	Mikko H. Lipasti, John Paul Shen	Superspeculative Microarchitecture for Beyond AD 2000.	IEEE Computer	1997	DBLP DOI BibTeX RDF
1	Mikko H. Lipasti, John Paul Shen	The Performance Potential of Value and Dependence Prediction.	Euro-Par	1997	DBLP DOI BibTeX RDF
1	Yuan C. Chou, Daniel P. Siewiorek, John Paul Shen	A Realistic Study on Multithreaded Superscalar Processor Design.	Euro-Par	1997	DBLP DOI BibTeX RDF
1	Chris J. Newburn, John Paul Shen	Compiler Support for Low-Cost Synchronization Among Threads.	PARCO	1997	DBLP BibTeX RDF
1	Derek B. Noonburg, John Paul Shen	A Framework for Statistical Modeling of Superscalar Processor Performance.	HPCA	1997	DBLP DOI BibTeX RDF
1	Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen	Value Locality and Load Value Prediction.	ASPLOS	1996	DBLP DOI BibTeX RDF
1	Andrew S. Huang, John Paul Shen	The Intrinsic Bandwidth Requirements of Ordinary Programs.	ASPLOS	1996	DBLP DOI BibTeX RDF
1	Mikko H. Lipasti, John Paul Shen	Exceeding the Dataflow Limit via Value Prediction.	MICRO	1996	DBLP BibTeX RDF
1	Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen	Can Trace-Driven Simulators Accurately Predict Superscalar Performance? (PDF / PS)	ICCD	1996	DBLP DOI BibTeX RDF
1	Trung A. Diep, John Paul Shen	VMW: A Visualization-Based Microarchitecture Workbench.	IEEE Computer	1995	DBLP DOI BibTeX RDF
1	Trung A. Diep, Christopher Nelson, John Paul Shen	Performance Evaluation of the PowerPC 620 Microarchitecture.	ISCA	1995	DBLP DOI BibTeX RDF	PowerPC
1	Andrew S. Huang, John Paul Shen	A limit study of local memory requirements using value reuse profiles.	MICRO	1995	DBLP DOI BibTeX RDF
1	Trung A. Diep, John Paul Shen	Systematic Validation of Pipeline Interlock for Superscalar Microarchitectures.	FTCS	1995	DBLP DOI BibTeX RDF
1	Michael A. Schuette, John Paul Shen	Exploiting Instruction-Level Parallelism for Integrated Control-Flow Monitoring.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	control-flow monitoring, machine parallelism, idle resources, Multiflow TRACE 14/300 processor, TRACE 14/300, available resource-driven control-flow monitoring, parallel architectures, fault tolerant computing, error detection, instruction-level parallelism, concurrent error detection
1	Andrew S. Huang, Gert Slavenburg, John Paul Shen	Speculative Disambiguation: A Compilation Technique for Dynamic Memory Disambiguation.	ISCA	1994	DBLP DOI BibTeX RDF
1	Derek B. Noonburg, John Paul Shen	Theoretical modeling of superscalar processor performance.	MICRO	1994	DBLP DOI BibTeX RDF
1	Chris J. Newburn, Derek B. Noonburg, John Paul Shen	A PDG-based Tool and its Use in Analyzing Program Control Dependences.	IFIP PACT	1994	DBLP BibTeX RDF
1	Michael A. Schuette, John Paul Shen	Instruction-level experimental evaluation of the Multiflow TRACE 14/300 VLIW computer.	The Journal of Supercomputing	1993	DBLP DOI BibTeX RDF
1	Trung A. Diep, John Paul Shen, Mike Phillip	EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors.	MICRO	1993	DBLP DOI BibTeX RDF
1	Chris J. Newburn, Andrew S. Huang, John Paul Shen	Balancing Fine- and Medium-Grained Parallelism in Scheduling Loops for the XIMD Architecture.	Architectures and Compilation Techniques for Fine and Medium Grain Parallelism	1993	DBLP BibTeX RDF
1	Trung A. Diep, Mikko H. Lipasti, John Paul Shen	Architecture-Compatible Code Boosting for Performance Enhancement of the IBM RS/6000.	ICCD	1993	DBLP BibTeX RDF
1	Scott H. Robinson, John Paul Shen	Direct Methods for Synthesis of Self-Monitoring State Machines.	FTCS	1992	DBLP DOI BibTeX RDF
1	Chriss Stephens, Bryce Cogswell, John Heinlein, Gregory Palmer, John Paul Shen	Instruction Level Profiling and Evaluation of the IBM/6000.	ISCA	1991	DBLP DOI BibTeX RDF
1	Andrew Wolfe, John Paul Shen	A Variable Instruction Stream Extension to the VLIW Architecture.	ASPLOS	1991	DBLP DOI BibTeX RDF
1	Mauricio Breternitz Jr., John Paul Shen	Implementation Optimization Techniques for Architecture Synthesis of Application-Specific Processors.	MICRO	1991	DBLP DOI BibTeX RDF
1	Michael A. Schuette, John Paul Shen	An Instruction-Level Performance Analysis of the Multiflow TRACE 14/300.	MICRO	1991	DBLP DOI BibTeX RDF
1	Michael A. Schuette, John Paul Shen	Exploiting Instruction-Level Resource Parallelism for Transparent, Integrated Control-Flow Monitoring.	FTCS	1991	DBLP DOI BibTeX RDF
1	Kent D. Wilken, John Paul Shen	Continuous signature monitoring: low-cost concurrent detection of processor control errors.	IEEE Trans. on CAD of Integrated Circuits and Systems	1990	DBLP DOI BibTeX RDF
1	Mauricio Breternitz Jr., John Paul Shen	Architecture Synthesis of High-Performance Application-Specific Processors.	DAC	1990	DBLP DOI BibTeX RDF
1	Scott H. Robinson, John Paul Shen	Evaluation and Synthesis of Self-Monitoring State Machines.	ICCAD	1990	DBLP BibTeX RDF
1	F. Joel Ferguson, John Paul Shen	A CMOS fault extractor for inductive fault analysis.	IEEE Trans. on CAD of Integrated Circuits and Systems	1988	DBLP DOI BibTeX RDF
1	John Paul Shen, F. Joel Ferguson	Extraction and Simulation of Realistic CMOS Faults Using Inductive Fault Analysis.	ITC	1988	DBLP DOI BibTeX RDF
1	Kent D. Wilken, John Paul Shen	Continuous Signature Monitoring: Efficient Concurrent-Detection of Processor Control Errors.	ITC	1988	DBLP DOI BibTeX RDF
1	Andrew Wolfe, Mauricio Breternitz Jr., Chriss Stephens, A. L. Ting, D. B. Kirk, Ronald P. Bianchini Jr., John Paul Shen	The White Dwarf: A High-Performance Application-Specific Processor.	ISCA	1988	DBLP BibTeX RDF
1	Mauricio Breternitz Jr., John Paul Shen	Organization of array data for concurrent memory access.	MICRO	1988	DBLP DOI BibTeX RDF
1	Andrew Wolfe, John Paul Shen	Flexible processors: a promising application-specific processor design approach.	MICRO	1988	DBLP DOI BibTeX RDF
1	Ronald P. Bianchini Jr., John Paul Shen	Interprocessor Traffic Scheduling Algorithm for Multiple-Processor Networks.	IEEE Trans. Computers	1987	DBLP DOI BibTeX RDF
1	Michael A. Schuette, John Paul Shen	Processor Control Flow Monitoring Using Signatured Instruction Streams.	IEEE Trans. Computers	1987	DBLP DOI BibTeX RDF	transient and intermittent faults, Control flow monitoring, error detection coverage and latency, fault insertion experiments, roving monitoring, signatured instruction streams, signature analysis
1	John Paul Shen, John P. Hayes, Luigi Ciminiera, Angelo Serra	Fault-tolerance and performance analysis of beta-networks.	Parallel Computing	1986	DBLP DOI BibTeX RDF
1	John Paul Shen	Highlights of CMU Research on CAD, CAM, CAT of VLSI Circuits.	FJCC	1986	DBLP BibTeX RDF
1	Patrick P. Fasang, Michael A. Schuette, John Paul Shen, William A. Gwaltney	Automated Design for Testability of Semicustom Integrated Circuits.	ITC	1985	DBLP BibTeX RDF
1	John Paul Shen, John P. Hayes	Fault-Tolerance of Dynamic-Full-Access Interconnection Networks.	IEEE Trans. Computers	1984	DBLP DOI BibTeX RDF	Eulerian graphs, fault-tolerance, parallel processing, interconnection networks, fault diagnosis
1	John Paul Shen, F. Joel Ferguson	The Design of Easily Tastabel VLSI Array Multipliers.	IEEE Trans. Computers	1984	DBLP DOI BibTeX RDF	design for testability, VLSI testing, Array multipliers, C-testability, exhaustive testing
1	Wojciech Maly, F. Joel Ferguson, John Paul Shen	Systematic Characterization of Physical Defects for Fault Analysis of MOS IC Cells.	ITC	1984	DBLP BibTeX RDF
1	Michael A. Schuette, John Paul Shen	On-Line Self-Monitoring Using Signatured Instruction Streams.	ITC	1983	DBLP BibTeX RDF
1	David C. H. Lee, John Paul Shen	Easily-Testable (N, K) Shuffle/Exchange Networks.	ICPP	1983	DBLP BibTeX RDF
1	F. Joel Ferguson, John Paul Shen	The design of two easily-testable VLSI array multipliers.	IEEE Symposium on Computer Arithmetic	1983	DBLP DOI BibTeX RDF
1	John Paul Shen	Fault tolerance analysis of several interconnection networks.	ICPP	1982	DBLP BibTeX RDF
1	John Paul Shen, John P. Hayes	Fault Tolerance of a Class of Connecting Networks.	ISCA	1980	DBLP DOI BibTeX RDF

Publications of "John Paul Shen" ( http://dblp.L3S.de/Authors/John_Paul_Shen )