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Found 7 publication records. Showing 7 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jokin Segundo, Jesús Arias, Luis Quintanilla, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente |
A 1.2 V, 130 nm CMOS parallel continuous-time ΣΔ ADC for OFDM UWB receivers.  |
Microelectronics Journal  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Luis Quintanilla, Jesús Arias, Jokin Segundo, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente |
Detailed analysis of the effect of a hysteretic quantizer in a multibit, Sigma-Delta modulator. |
Microelectronics Journal |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Jokin Segundo, Jesús Arias, Luis Quintanilla, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente |
A parallel, CT-ΔΣ based ADC for OFDM UWB receivers in 130 nm CMOS. |
ICECS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Luis Quintanilla, Jesús Arias, Jokin Segundo, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente |
A comprehensive analysis of the effect of finite amplifier bandwidth and excess loop delay in continuous-time sigma-delta modulators. |
Microelectronics Journal |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jesús Arias, Luis Quintanilla, Jokin Segundo, Lourdes Enríquez, José Vicente, Jesús M. Hernández-Mangas |
Parallel Continuous-Time DeltaSigma ADC for OFDM UWB Receivers. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jokin Segundo, Luis Quintanilla, Jesús Arias, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente |
A PLL-based synthesizer for tunable digital clock generation in a continuous-time SigmaDelta A/D converter. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jesús Arias, Luis Quintanilla, Lourdes Enríquez, Jesús M. Hernández-Mangas, José Vicente, Jokin Segundo |
A 1-GHz, multibit, continuous-time, delta-sigma ADC for Gigabit Ethernet. |
Microelectronics Journal |
2008 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #7 of 7 (100 per page; Change: )
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