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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 10 occurrences of 10 keywords
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Results
Found 13 publication records. Showing 13 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Ankur Agrawal, John F. Bulzacchelli, Timothy O. Dickson, Yong Liu, José A. Tierno, Daniel J. Friedman |
A 19Gb/s serial link receiver with both 4-tap FFE and 5-tap DFE functions in 45nm SOI CMOS.  |
ISSCC  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Sameh W. Asaad, Ralph Bellofatto, Bernard Brezzo, Chuck Haymes, Mohit Kapur, Benjamin D. Parker, Thomas Roewer, Proshanta Saha, Todd Takken, José A. Tierno |
A cycle-accurate, cycle-reproducible multi-FPGA system for accelerating multi-core processor simulation. |
FPGA |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Bishop Brock, Charles Lefurgy, Alan J. Drake, Lorena Pesantez, Tilman Gloekler, José A. Tierno, Pradip Bose, Alper Buyuktosunoglu |
Introducing the Adaptive Energy Management Features of the Power7 Chip. |
IEEE Micro |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Tilman Gloekler, Bishop Brock, Pradip Bose, Alper Buyuktosunoglu, Juan C. Rubio, Birgit Schubert, Bruno Spruth, José A. Tierno, Lorena Pesantez |
Adaptive energy-management features of the IBM POWER7 chip. |
IBM Journal of Research and Development |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D. Parker, Steven K. Esser, Robert K. Montoye, Bipin Rajendran, José A. Tierno, Leland Chang, Dharmendra S. Modha, Daniel J. Friedman |
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons. |
CICC |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Charles Lefurgy, Alan J. Drake, Michael S. Floyd, Malcolm Allen-Ware, Bishop Brock, José A. Tierno, John B. Carter |
Active management of timing guardband to save energy in POWER7. |
MICRO |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Montek Singh, José A. Tierno, Alexander Rylyakov, Sergey Rylov, Steven M. Nowick |
An Adaptively Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 Gigahertz. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Alexander Rylyakov, José A. Tierno, Herschel A. Ainspan, Jean-Olivier Plouchart, John F. Bulzacchelli, Zeynep Toprak Deniz, Daniel J. Friedman |
Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications. |
ISSCC |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | José A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick |
An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz. |
ASYNC |
2002 |
DBLP DOI BibTeX RDF |
PRML read channel, magnetic recording, asynchronous pipeline, digital arithmetic, FIR filter, dynamic logic, high-throughput, low-latency, distributed arithmetic, mixed timing |
| 1 | Rajit Manohar, José A. Tierno |
Asynchronous Parallel Prefix Computation. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
average-case latency, Asynchronous circuits, prefix computation, binary addition |
| 1 | Z. John Deng, Steve R. Whiteley, Theodore Van Duzer, José A. Tierno |
Asynchronous Circuits and Systems in Superconducting RSFQ Digital Technology. |
ASYNC |
1998 |
DBLP DOI BibTeX RDF |
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| 1 | José A. Tierno, Prabhakar Kudva |
Asynchronous Transpose-Matrix Architectures. |
ICCD |
1997 |
DBLP BibTeX RDF |
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| 1 | José A. Tierno, Alain J. Martin, Drazen Borkovic, Tak-Kwan Lee |
A 100-MIPS GaAs Asynchronous Microprocessor. |
IEEE Design & Test of Computers |
1994 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #13 of 13 (100 per page; Change: )
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