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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 31 occurrences of 22 keywords
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Found 61 publication records. Showing 61 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida |
Power optimization in heterogenous datapaths.  |
DATE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, Jose Manuel Mendias, Román Hermida |
A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandros Bartzas, Miguel Peón Quirós, Christophe Poucet, Christos Baloukas, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias |
Software metadata: Systematic characterization of the memory behaviour of dynamic applications. |
Journal of Systems and Software |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik |
Using Speculative Functional Units in high level synthesis. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías |
Performance-driven scheduling of behavioural specifications. |
Integration |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias |
Direct memory access usage optimization in network applications for reduced memory latency and energy consumption. |
J. Embedded Computing |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, Rafael Ruiz-Sautua, Alberto A. Del Barrio, Jose Manuel Mendias |
Subword Switching Activity Minimization to Optimize Dynamic Power Consumption. |
IEEE Design & Test of Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida |
Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis. |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias |
Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida, Francisco Tirado |
Applying speculation techniques to implement functional units. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida |
HW-SW emulation framework for temperature-aware design in MPSoCs. |
ACM Trans. Design Autom. Electr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
Thermal-aware design, FPGA, emulation, MPSoC, temperature |
| 1 | Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias |
Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Miguel Peón Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris |
Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. |
PATMOS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Salvatore Carta, Andrea Acquaviva, Pablo Garcia Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias |
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
thermal studies, FPGA, operating system, emulation, MPSoC |
| 1 | María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida |
Area optimization of multi-cycle operators in high-level synthesis. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Pre-synthesis optimization of multiplications to improve circuit performance. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor |
Systematic dynamic memory management design methodology for reduced memory footprint. |
ACM Trans. Design Autom. Electr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
Multimedia embedded systems, custom dynamic memory management, reduced memory footprint, operating systems, memory management |
| 1 | María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida |
Bitwise scheduling to balance the computational cost of behavioral specifications. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris |
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems. |
Integration |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Pablo Garcia Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli |
A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. |
VLSI-SoC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias |
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
thermal studies, FPGA, emulation, MPSoC |
| 1 | Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias |
Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Marc Leeman, David Atienza, Geert Deconinck, Vincenzo De Florio, José M. Mendías, Chantal Ykman-Couvreur, Francky Catthoor, Rudy Lauwereins |
Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications. |
VLSI Signal Processing |
2005 |
DBLP DOI BibTeX RDF |
dynamic data types, multimedia, low power, memory management, memory hierarchy, memory bandwidth, dynamic memory management, system-level exploration, memory footprint |
| 1 | Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis |
Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. |
WWIC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Arrival time aware scheduling to minimize clock cycle length. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida |
Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor, Francisco Tirado, Jose Manuel Mendias |
Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems. |
PATMOS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor |
A Complete Network-On-Chip Emulation Framework. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor |
A novel approach for network on chip emulation. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | J. B. Pérez-Ramas, David Atienza, Miguel Peón Quirós, Ivan Magan, Jose Manuel Mendias, Román Hermida |
Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs. |
PARCO |
2005 |
DBLP BibTeX RDF |
|
| 1 | Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida |
Performance-driven read-after-write dependencies softening in high-level synthesis. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Edgar G. Daylight, David Atienza, Arnout Vandecappelle, Francky Catthoor, José M. Mendías |
Memory-access-aware data structure transformations for embedded software with dynamic data accesses. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP BibTeX RDF |
|
| 1 | María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida |
Behavioural Scheduling to Balance the Bit-Level Computational Effort. (PDF / PS) |
ISVLSI |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida |
Behavioural Bitwise Scheduling Based on Computational Effort Balancing. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris |
Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems. |
PATMOS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | José Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado, Katzalin Olcoz, Jose Manuel Mendias |
Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded Systems. |
Interaction between Compilers and Computer Architectures |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Francesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias |
An integrated hardware/software approach for run-time scratchpad management. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
AMBA AHB, scratchpad, DMA, dynamic allocation |
| 1 | Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis |
Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. |
WWIC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Marc Leeman, Francky Catthoor, Geert Deconinck, Jose Manuel Mendias, Vincenzo De Florio, Rudy Lauwereins |
Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices. |
ICME |
2004 |
DBLP BibTeX RDF |
|
| 1 | David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris |
Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris |
Reducing memory accesses with a system-level design methodology in customized dynamic memory management. |
ESTImedia |
2004 |
DBLP BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida |
Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
High-Level Allocation to Minimize Internal Hardware Wastage. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Marc Leeman, David Atienza, Francky Catthoor, Vincenzo De Florio, Geert Deconinck, Jose Manuel Mendias, Rudy Lauwereins |
Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level. |
PATMOS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Olga Peñalba, José M. Mendías, Román Hermida |
A global approach to improve conditional hardware reuse in high-level synthesis. |
Journal of Systems Architecture |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | José M. Mendías, Román Hermida, Olga Peñalba |
A study about the efficiency of formal high-level synthesis applied to verification. |
Integration |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Aitor Ibarra, José M. Mendías, Juan Lanchares, José Ignacio Hidalgo, Román Hermida |
Optimization of Equational Specifications Using Genetic Techniques. |
DSD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | José M. Mendías, Román Hermida, María C. Molina, Olga Peñalba |
Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis. |
DSD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Olga Peñalba, José M. Mendías, Román Hermida |
Source Code Transformation to Improve Conditional Hardware Reuse. |
DSD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
Bit-Level Allocation of Multiple-Precision Specifications. |
DSD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
High-level synthesis of multiple-precision circuitsindependent of data-objects length. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
scheduling, high-level synthesis, allocation, multiple-precision |
| 1 | Olga Peñalba, José M. Mendías, Román Hermida |
Maximizing Conditonal Reuse by Pre-Synthesis Transformations. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
Multiple-Precision Circuits Allocation Independent of Data-Objects Length. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | María C. Molina, José M. Mendías, Román Hermida |
Bit-level scheduling of heterogeneous behavioural specifications. |
ICCAD |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida |
Transformation of Equational Specification by Means of Genetic Programming. |
EuroGP |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Olga Peñalba, José M. Mendías, María C. Molina |
Execution Condition Analysis in High Level Synthesis: A Unified Approach. |
ISSS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Olga Peñalba, José M. Mendías, Román Hermida |
A Unified Algorithm for Mutual Exclusiveness Identification. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | José M. Mendías, Román Hermida |
Correct High-Level Synthesis: a Formal Perspective. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
automatic formal synthesis, formal verification, high-level synthesis, streams |
| 1 | José M. Mendías, Román Hermida, Milagros Fernández |
Formal Techniques for Hardware Allocation. |
VLSI Design |
1997 |
DBLP DOI BibTeX RDF |
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