Search results for "Jung Hwan Choi"

Found 13 publication records. Showing 13 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Jongsun Park, Jung Hwan Choi, Kaushik Roy	Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Jung Hwan Choi, Byung Guk Kim, Aurobindo Dasgupta, Kaushik Roy	Improved clock-gating control scheme for transparent pipeline.	ASP-DAC	2010	DBLP DOI BibTeX RDF
1	Jung Hwan Choi, Nilanjan Banerjee, Kaushik Roy	Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters.	IEEE Trans. on CAD of Integrated Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy	Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering.	IEEE Trans. on CAD of Integrated Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy	Profit Aware Circuit Design Under Process Variations Considering Speed Binning.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy	O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy	Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy	A process variation aware low power synthesis methodology for fixed-point FIR filters.	ISLPED	2007	DBLP DOI BibTeX RDF	fixed-point FIR filters, variation aware, low-power, synthesis
1	Jung Hwan Choi, Jayathi Murthy, Kaushik Roy	The effect of process variation on device temperature in FinFET circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
1	Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy	Speed binning aware design methodology to improve profit under parameter variations.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy	Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Jongsun Park, Jung Hwan Choi, Kaushik Roy	Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off.	DATE	2006	DBLP DOI BibTeX RDF
1	Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy	Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits.	ICCAD	2006	DBLP DOI BibTeX RDF

Publications of "Jung Hwan Choi" ( http://dblp.L3S.de/Authors/Jung_Hwan_Choi )