Search results for "Keivan Navi"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Mohammad Reza Reshadinezhad, Mohammad Hossein Moaiyeri, Keivan Navi	An Energy-Efficient Full Adder Cell Using CNFET Technology.	IEICE Transactions	2012	DBLP BibTeX RDF
1	Mariam Zomorodi Moghadam, Keivan Navi	Ultra-area-efficient reversible multiplier.	Microelectronics Journal	2012	DBLP DOI BibTeX RDF
1	Mehdi Ghasemi, Mohammad Hossein Moaiyeri, Keivan Navi	A New Full Adder Cell for Molecular Electronics	CoRR	2012	DBLP BibTeX RDF
1	Mostafa Rahimi Azghadi, Omid Kavehie, Keivan Navi	A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders	CoRR	2012	DBLP BibTeX RDF
1	Mostafa Rahimi Azghadi, Omid Kavehie, Keivan Navi	A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders	CoRR	2012	DBLP BibTeX RDF
1	Keivan Navi, Mohammad Esmaeildoust, Amir Sabbagh Molahosseini	A General Reverse Converter Architecture with Low Complexity and High Performance.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Ehsan Pour Ali Akbar, Majid Haghparast, Keivan Navi	Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	Mohammad A. Tehrani, Farshad Safaei, Mohammad Hossein Moaiyeri, Keivan Navi	Design and implementation of Multistage Interconnection Networks using Quantum-dot Cellular Automata.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	Mohammad Rashtian, Omid Hashemipour, Keivan Navi, Ali Jalali	A New Switched opamp Approach for Improving the Operation of Auto-Reset Switched-capacitor Filters.	Journal of Circuits, Systems, and Computers	2011	DBLP DOI BibTeX RDF
1	Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Hamid Khorsand, Keivan Navi	A New Robust and High-Performance Hybrid Full Adder Cell.	Journal of Circuits, Systems, and Computers	2011	DBLP DOI BibTeX RDF
1	Keivan Navi, Akbar Doostaregan, Mohammad Hossein Moaiyeri, Omid Hashemipour	A hardware-friendly arithmetic method and efficient implementations for designing digital fuzzy adders.	Fuzzy Sets and Systems	2011	DBLP DOI BibTeX RDF
1	Reza Moraveji, Hamid Sarbazi-Azad, Abbas Nayebi, Keivan Navi	Modeling the effects of hot-spot traffic load on the performance of wormhole-switched hypermeshes.	Computers & Electrical Engineering	2011	DBLP DOI BibTeX RDF
1	Keivan Navi, Amir Sabbagh Molahosseini, Mohammad Esmaeildoust	How to Teach Residue Number System to Computer Scientists and Engineers.	IEEE Trans. Education	2011	DBLP DOI BibTeX RDF
1	Keivan Navi, Horialsadat Hossein Sajedi, Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Ali Jalali, Omid Kavehie	High-speed full adder based on minority function and bridge style for nanoscale.	Integration	2011	DBLP DOI BibTeX RDF
1	Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani	Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits.	VLSI Design	2010	DBLP DOI BibTeX RDF
1	Keivan Navi, Fazel Sharifi, Amir Momeni, Peiman Keshavarzian	Ultra High Speed CNFET Full-Adder Cell Based on Majority Gates.	IEICE Transactions	2010	DBLP BibTeX RDF
1	Keivan Navi, Razieh Farazkish, Samira Sayedsalehi, Mostafa Rahimi Azghadi	A new quantum-dot cellular automata full-adder.	Microelectronics Journal	2010	DBLP DOI BibTeX RDF
1	Amir Sabbagh Molahosseini, Keivan Navi, Chitra Dadkhah, Omid Kavehei, Somayeh Timarchi	Efficient Reverse Converter Designs for the New 4-Moduli Sets 2n -1, 2n, 2n +1, 22n + 1-1 and 2n -1, 2n +1, 22n, 22n +1 Based on New CRTs.	IEEE Trans. on Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Amir Sabbagh Molahosseini, Keivan Navi	A Reverse Converter for the Enhanced Moduli Set {2n-1, 2n+1, 22n, 22n+1-1} Using CRT and MRC.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Somayyeh Jafarali Jassbi, Mehdi Hosseinzade, Keivan Navi	Redundant Multi-Level one-hot Residue Number System based error correction codes.	EWDTS	2010	DBLP DOI BibTeX RDF
1	Amir Sabbagh Molahosseini, Faegheh Teymouri, Keivan Navi	A new four-modulus RNS to binary converter.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Tooraj Nikoubin, Fatemeh Eslami, Amirali Baniasadi, Keivan Navi	A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic.	J. Low Power Electronics	2009	DBLP DOI BibTeX RDF
1	Amir Sabbagh Molahosseini, Chitra Dadkhah, Keivan Navi, Mohammad Eshghi	Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n -1, 2n+1 -1} and {22n, 2n -1, 2n-1 -1}.	IEICE Transactions	2009	DBLP BibTeX RDF
1	Keivan Navi, Mohammad Hossein Moaiyeri, Reza Faghih Mirzaee, Omid Hashemipour, Babak Mazloom Nezhad	Two new low-power Full Adders based on majority-not gates.	Microelectronics Journal	2009	DBLP DOI BibTeX RDF
1	Keivan Navi, Vahid Foroutan, Mostafa Rahimi Azghadi, Mehrdad Maeen, Maryam Ebrahimpour, M. Kaveh, Omid Kavehie	A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter.	Microelectronics Journal	2009	DBLP DOI BibTeX RDF
1	Majid Haghparast, Majid Mohammadi, Keivan Navi, Mohammad Eshghi	Optimized Reversible Multiplier Circuit.	Journal of Circuits, Systems, and Computers	2009	DBLP DOI BibTeX RDF
1	Mohammad Hossein Moaiyeri, Reza Faghih Mirzaee, Keivan Navi	Two New Low-Power and High-Performance Full Adders.	JCP	2009	DBLP DOI BibTeX RDF
1	Somayeh Timarchi, Keivan Navi	Arithmetic Circuits of Redundant SUT-RNS.	IEEE T. Instrumentation and Measurement	2009	DBLP DOI BibTeX RDF
1	Arash Hariri, Keivan Navi, Reza Rastegar	A High Dynamic Range 3-Moduli-Set with Efficient Reverse Converter	CoRR	2009	DBLP BibTeX RDF
1	Keivan Navi, Mehrdad Maeen, Vahid Foroutan, Somayeh Timarchi, Omid Kavehie	A novel low-power full-adder cell for low voltage.	Integration	2009	DBLP DOI BibTeX RDF
1	Somayeh Timarchi, Keivan Navi, Omid Kavehie	Maximally Redundant High-Radix Signed-Digit Adder: New Algorithm and Implementation.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Amir Sabbagh Molahosseini, Keivan Navi, Omid Hashemipour, Ali Jalali	An efficient architecture for designing reverse converters based on a general three-moduli set.	Journal of Systems Architecture - Embedded Systems Design	2008	DBLP DOI BibTeX RDF
1	Aminollah Mahabadi, Hamid Sarbazi-Azad, Ebrahim Khodaie, Keivan Navi	Parallel Lagrange interpolation on k -ary n -cubes with maximum channel utilization.	The Journal of Supercomputing	2008	DBLP DOI BibTeX RDF	Link-disjoint Hamiltonian cycles, Parallel algorithms, Performance analysis, Interconnection networks, Multicomputers, k-ary n-cubes, Lagrange interpolation
1	Keivan Navi, Omid Kavehie, Mahnoush Rouholamini, Amir Sahafi, Shima Mehrabi, Nooshin Dadkhahi	Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell.	JCP	2008	DBLP DOI BibTeX RDF
1	Arash Hariri, Keivan Navi, Reza Rastegar	A new high dynamic range moduli set with efficient reverse converter.	Computers & Mathematics with Applications	2008	DBLP DOI BibTeX RDF
1	Omid Kavehie, Mostafa Rahimi Azghadi, Keivan Navi, Amir-Pasha Mirbaha	Design of Robust and High-Performance 1-Bit CMOS Full Adder for Nanometer Design.	ISVLSI	2008	DBLP DOI BibTeX RDF
1	Nasim Kazemifard, Maryam Ebrahimpour, Mostafa Rahimi Azghadi, Mohammad A. Tehrani, Keivan Navi	Performance evaluation of In-Circuit Testing on QCA based circuits.	EWDTS	2008	DBLP DOI BibTeX RDF
1	Reza Moraveji, Hamid Sarbazi-Azad, Abbas Nayebi, Keivan Navi	Performance Modeling of Wormhole Hypermeshes Under Hotspot Traffic.	CSR	2007	DBLP DOI BibTeX RDF	Hypermesh, Hotspot traffic, Interconnection network, Performance modeling
1	Keivan Navi, Omid Kavehie, Mahnoush Rouholamini, Amir Sahafi, Shima Mehrabi	A Novel CMOS Full Adder.	VLSI Design	2007	DBLP DOI BibTeX RDF
1	Mahnoush Rouholamini, Omid Kavehie, Amir-Pasha Mirbaha, Somaye Jafarali Jasbi, Keivan Navi	A New Design for 7: 2 Compressors.	AICCSA	2007	DBLP DOI BibTeX RDF
1	Reza Sharifi Sedeh, Sara Sharifi Sedeh, Keivan Navi	Using Car Semi-Active Suspension Systems To Decrease Undesirable Effects Of Road Excitations On Human Health.	BIOCOMP	2006	DBLP BibTeX RDF
1	Sara Sharifi Sedeh, Reza Sharifi Sedeh, Keivan Navi	Reducing Harmful Effects Of Road Excitations On Human Health By Designing Car Active Suspension Systems.	BIOCOMP	2006	DBLP BibTeX RDF
1	Arash Hariri, Reza Rastegar, Keivan Navi, Morteza Saheb Zamani, Mohammad Reza Meybodi	Cellular Learning Automata based Evolutionary Computing (CLA-EC) for Intrinsic Hardware Evolution.	Evolvable Hardware	2005	DBLP DOI BibTeX RDF
1	Keivan Navi, Daniel Etiemble	From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic Operators. (PDF / PS)	ISMVL	1995	DBLP DOI BibTeX RDF	multivalued current mode CMOS circuits, voltage mode CMOS arithmetic operators, 3-valued current mode CMOS 2-input BSC adder, CMOS binary 4-2 counter, 1-digit Avizienis-like adder, adders, CMOS integrated circuits, integrated logic circuits, multivalued logic circuits, ternary logic, redundant number representation
1	A. Kazeminejad, Keivan Navi, Daniel Etiemble	CML Current Mode Full Adders for 2.5-V Power Supply.	ISMVL	1994	DBLP BibTeX RDF
1	Keivan Navi, A. Kazeminejad, Daniel Etiemble	Performance of CMOS Current Mode Full Adders.	ISMVL	1994	DBLP BibTeX RDF
1	Daniel Etiemble, Keivan Navi	A Basis for the Comparison of Binary and m-Valued Current Mode Circuits: the Multioperand Addition with Redundant Number Systems.	ISMVL	1993	DBLP BibTeX RDF
1	Daniel Etiemble, Keivan Navi	Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF

Publications of "Keivan Navi" ( http://dblp.L3S.de/Authors/Keivan_Navi )