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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 4 occurrences of 4 keywords
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Results
Found 16 publication records. Showing 16 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yu-Chi Tsao, Ken Choi |
Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Haiqing Nan, Li Li, Ken Choi |
TDDB-based performance variation of combinational logic in deeply scaled CMOS technology. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Haiqing Nan, Ken Choi |
Novel radiation hardened latch design considering process, voltage and temperature variations for nanoscale CMOS technology. |
Microelectronics Reliability |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Haiqing Nan, Kyung Ki Kim, Wei Wang 0029, Ken Choi |
Dynamic Voltage and Frequency Scaling for Power- Constrained Design using Process Voltage and Temperature Sensor Circuits. |
JIPS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Sandeep Sriram, Haiqing Nan, Ken Choi |
Low power latch design in near sub-threshold region to improve reliability for soft error. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Li Li, Ken Choi, Haiqing Nan |
Effective algorithm for integrating clock gating and power gating to reduce dynamic and active leakage power simultaneously. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Yu-Chi Tsao, Ken Choi |
Hardware-efficient parallel FIR digital filter structures for symmetric convolutions. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung Ki Kim, Wei Wang 0029, Ken Choi |
On-Chip Aging Sensor Circuits for Reliable Nanometer MOSFET Digital Circuits. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung Ki Kim, Haiqing Nan, Ken Choi |
Adaptive HCI-aware power gating structure. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung Ki Kim, Haiqing Nan, Ken Choi |
Power gating for ultra-low voltage nanometer ICs. |
ISCAS |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung Ki Kim, Haiqing Nan, Ken Choi |
Hybrid MOSFET/CNFET based power gating structure. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kyung Ki Kim, Haiqing Nan, Ken Choi |
Ultralow-Voltage Power Gating Structure Using Low Threshold Voltage. |
IEEE Trans. on Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin |
Frequency and yield optimization using power gates in power-constrained designs. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
optimization, yield, power gate, frequency |
| 1 | Li Li, Ken Choi, Seongmo Park, MooKyung Chung |
Selective clock gating by using wasting toggle rate. |
EIT |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Feng Ge, P. Jain, Ken Choi |
Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology. |
EIT |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jerry Frenkil, Ken Choi, Kimiyoshi Usami |
Power Gating for Ultra-low Leakage: Physics, Design, and Analysis. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
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