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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2 occurrences of 2 keywords
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Results
Found 42 publication records. Showing 42 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Wei Fei, Hao Yu, Wei Zhang, Kiat Seng Yeo |
Design Exploration of Hybrid CMOS and Memristor Circuit by New Modified Nodal Analysis.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Manthena Vamshi Krishna, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo |
A Low-Power Single-Phase Clock Multiband Flexible Divider.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Qiong Zou, Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim |
Design of a Ku-band Low-Phase-Noise VCO Using the Dual LC Tanks.  |
IEEE Trans. on Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Myint Wai Phyu, Kangkang Fu, Wang Ling Goh, Kiat Seng Yeo |
Power-Efficient Explicit-Pulsed Dual-Edge Triggered Sense-Amplifier Flip-Flops.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo, Jeremy Yung Shern Low |
Design and Sensitivity Analysis of a New Current-Mode Sense Amplifier for Low-Power SRAM.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Keping Wang, Zhigong Wang, XueMei Lei, Xiang Cao, Peng Han, Geliang Yang, Kaixue Ma, Kiat Seng Yeo |
A Low-Loss Image-Reject Mixer Using Source Follower Isolation Method for DRM/DAB Tuner Applications.  |
IEEE Trans. on Circuits and Systems  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anh-Tuan Do, Jeremy Yung Shern Low, Joshua Yung Lih Low, Zhi-Hui Kong, Xiaoliang Tan, Kiat Seng Yeo |
An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS.  |
IEEE Trans. on Circuits and Systems  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Aung Myat Thu Linn, Anh-Tuan Do, Shoushun Chen, Kiat Seng Yeo |
Adaptive priority toggle asynchronous tree arbiter for AER-based image sensor.  |
VLSI-SoC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anh-Tuan Do, Xiaoliang Tan, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo |
A comparative study of state-of-the-art low-power CAM match-line sense amplifier designs.  |
ACM Great Lakes Symposium on VLSI  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo |
A low-power CAM with efficient power and delay trade-off.  |
ISCAS  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Ali Meaamar, Chirn Chye Boon, Xiaomeng Shi, Wei Meng Lim, Kiat Seng Yeo, Manh Anh Do |
A 3.1-8 GHz CMOS UWB front-end receiver.  |
ISCAS  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Shouxian Mou, Kaixue Ma, Kiat Seng Yeo, Nagarajan Mahalingam, Bharatha Kumar Thangarasu |
A low power wide tuning range VCO with coupled LC tanks.  |
SoCC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Zhenghao Lu, Kiat Seng Yeo, Wei Meng Lim, Manh Anh Do, Chirn Chye Boon |
Design of a CMOS Broadband Transimpedance Amplifier With Active Feedback.  |
IEEE Trans. VLSI Syst.  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Ning Zhu, Wang Ling Goh, Weija Zhang, Kiat Seng Yeo, Zhi-Hui Kong |
Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing.  |
IEEE Trans. VLSI Syst.  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Ali Meaamar, Chirn Chye Boon, Kiat Seng Yeo, Manh Anh Do |
A Wideband Low Power Low-Noise Amplifier in CMOS Technology.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Aaron V. T. Do, Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Alper Cabuk |
An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim |
Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo |
Criterion to Evaluate Input-Offset Voltage of a Latch-Type Sense Amplifier.  |
IEEE Trans. on Circuits and Systems  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Manthena Vamshi Krishna, Xuan Jie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do |
A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4.  |
VLSI-SoC (Selected Papers)  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Aaron V. T. Do, Chirn Chye Boon, Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo |
A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole.  |
VLSI-SoC (Selected Papers)  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Manthena Vamshi Krishna, J. Xie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do |
A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Aaron V. T. Do, Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Alper Cabuk |
A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole.  |
VLSI-SoC  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kok Meng Lim, Jiangmin Gu, Yang Lu, Jinna Yan, Wei Meng Lim, Kaixue Ma, Kiat Seng Yeo |
Low power millimeter wave active sige sub-harmonic up-conversion mixer with ultra low driving power.  |
ICECS  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Kiat Seng Yeo, Zhi-Hui Kong, Nukala Nishant, Haitao Fu, Wei Zeng |
Integrated Circuit Design Research Ranking for Worldwide Universities.  |
Journal of Circuits, Systems, and Computers  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Kiat Seng Yeo, Zhi-Hui Kong |
Spicesoft: Automated Tool for Sensitivity Analysis, Performance Analysis, and Inverse Performance Analysis of Digital Circuits.  |
Journal of Circuits, Systems, and Computers  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Xiaomeng Shi, Kiat Seng Yeo, Jianguo Ma, Manh Anh Do, Erping Li |
Complex Shaped On-Wafer Interconnects Modeling for CMOS RFICs.  |
IEEE Trans. VLSI Syst.  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Shan Jiang, Manh Anh Do, Kiat Seng Yeo, Wei Meng Lim |
An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit.  |
IEEE Trans. on Circuits and Systems  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Anh-Tuan Do, Zhi-Hui Kong, Kiat Seng Yeo |
Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing.  |
IEEE Trans. on Circuits and Systems  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaomeng Shi, Kiat Seng Yeo, Jianguo Ma, Manh Anh Do |
Distortion of pulsed signals in carbon nanotube interconnects.  |
Microelectronics Journal  |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | J. J. Liu, Manh Anh Do, X. P. Yu, Kiat Seng Yeo, Shan Jiang, Jianguo Ma |
Cmos Even Harmonic Switching mixer for Direct Conversion Receivers.  |
Journal of Circuits, Systems, and Computers  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaopeng Yu, Manh Anh Do, Jianguo Ma, Kiat Seng Yeo |
A New Phase Noise Model for TSPC based divider.  |
VLSI-SoC  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Shan Jiang, Manh Anh Do, Kiat Seng Yeo |
A 200-MHz CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs.  |
VLSI-SoC  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi-Hui Kong, Kiat Seng Yeo, Chip-Hong Chang |
An Ultra Low-power Current-mode Sense Amplifier for Sram Applications.  |
Journal of Circuits, Systems, and Computers  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | X. P. Yu, Manh Anh Do, Lin Jia, Jianguo Ma, Kiat Seng Yeo |
Design of a low power wide-band high resolution programmable frequency divider.  |
IEEE Trans. VLSI Syst.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaomeng Shi, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do, Erping Li |
Equivalent circuit model of on-wafer CMOS interconnects for RFICs.  |
IEEE Trans. VLSI Syst.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei Meng Lim, Han Guo Ma, Manh Anh Do, Kiat Seng Yeo |
A 5GHz to 6GHz integrated differential LNA.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Myint Wai Phyu, Wang Ling Goh, Kiat Seng Yeo |
A low-power static dual edge-triggered flip-flop using an output-controlled discharge configuration.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do |
A novel methodology for the design of LC tank VCO with low phase noise.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | X. P. Yu, Manh Anh Do, Jianguo Ma, Kiat Seng Yeo |
A new 5 GHz CMOS dual-modulus prescaler.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Beng Hwee Ong, Choon Beng Sia, Kiat Seng Yeo, Jianguo Ma, Manh Anh Do, Erping Li |
Investigating the frequency dependence elements of CMOS RFIC interconnects for physical modeling.  |
SLIP  |
2004 |
DBLP DOI BibTeX RDF |
distributed effects, frequency dependence elements, physical model, skin effects |
| 1 | Lin Jia, Alper Cabuk, Jianguo Ma, Kiat Seng Yeo |
A 52 GHz VCO with Low Phase Noise Implemented in SiGe BiCMOS Technology.  |
IWSOC  |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiangmin Gu, Chip-Hong Chang, Kiat Seng Yeo |
An interconnect optimized floorplanning of a scalar product macrocell.  |
ISCAS  |
2002 |
DBLP DOI BibTeX RDF |
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