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Publications of "Koushik Chakraborty" ( http://dblp.L3S.de/Authors/Koushik_Chakraborty )

  Author page on DBLP  Author page in RDF  Community of Koushik Chakraborty in ASPL-2

Publication years (Num. hits)
2006-2011 (19) 2012 (5)
Publication types (Num. hits)
article(7) inproceedings(17)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 6 occurrences of 6 keywords

Results
Found 24 publication records. Showing 24 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi Supporting Overcommitted Virtual Machines through Hardware Spin Detection. Search on Bibsonomy IEEE Trans. Parallel Distrib. Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Koushik Chakraborty, Sanghamitra Roy Stack Aware Threshold Voltage Assignment in 3-D Multicore Designs. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Satyajit Desai, Sanghamitra Roy, Koushik Chakraborty Process variation aware DRAM design using block based adaptive body biasing algorithm. Search on Bibsonomy ISQED The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Kshitij Bhardwaj, Sanghamitra Roy, Koushik Chakraborty Power-Performance Yield optimization for MPSoCs using MILP. Search on Bibsonomy ISQED The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy An MILP-based aging-aware routing algorithm for NoCs. Search on Bibsonomy DATE The full citation details ... 2012 DBLP  BibTeX  RDF
1Sanghamitra Roy, Koushik Chakraborty Exploiting dynamic micro-architecture usage in gate sizing. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural Framework. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala Design and Implementation of a Throughput-Optimized GPU Floorplanning Algorithm. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty Integrated circuit-architectural framework for PSN aware floorplanning in microprocessors. Search on Bibsonomy ISQED The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yiding Han, Sanghamitra Roy, Koushik Chakraborty Optimizing simulated annealing on GPU: A case study with IC floorplanning. Search on Bibsonomy ISQED The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy Analysis and mitigation of NBTI aging in register file: An end-to-end approach. Search on Bibsonomy ISQED The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization. Search on Bibsonomy VLSI Design The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Koushik Chakraborty, Sanghamitra Roy Topologically homogeneous power-performance heterogeneous multicore systems. Search on Bibsonomy DATE The full citation details ... 2011 DBLP  BibTeX  RDF
1Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy Exploring high throughput computing paradigm for global routing. Search on Bibsonomy ICCAD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Koushik Chakraborty, Sanghamitra Roy A Novel Threshold Voltage Assignment for 3D Multicore Designs. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sanghamitra Roy, Koushik Chakraborty A convex optimization framework for leakage aware thermal provisioning in 3D multicore architectures. Search on Bibsonomy ISQED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Koushik Chakraborty, Sanghamitra Roy Rethinking Threshold Voltage Assignment in 3D Multicore Designs. Search on Bibsonomy VLSI Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Sanghamitra Roy, Koushik Chakraborty Microarchitecture aware gate sizing: A framework for circuit-architecture co-optimization. Search on Bibsonomy ICCD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi Dynamic heterogeneity and the need for multicore virtualization. Search on Bibsonomy Operating Systems Review The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi Mixed-mode multicore reliability. Search on Bibsonomy ASPLOS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dual-modular redundancy, multicore
1Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi Adapting to intermittent faults in multicore systems. Search on Bibsonomy ASPLOS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF overcommitted system, intermittent faults
1Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi Adapting to Intermittent Faults in Future Multicore Systems. Search on Bibsonomy PACT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi Hardware support for spin management in overcommitted virtual machines. Search on Bibsonomy PACT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF virtual machines, chip multiprocessors, synchronization overhead
1Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi Computation spreading: employing hardware migration to specialize CMP cores on-the-fly. Search on Bibsonomy ASPLOS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF dynamic specialization, cache locality
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