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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 5 occurrences of 5 keywords
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Results
Found 10 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Cheng-Ta Ko, Kuan-Neng Chen |
Low temperature bonding technology for 3D integration.  |
Microelectronics Reliability  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Ya-Sheng Tang, Yao-Jen Chang, Kuan-Neng Chen |
Wafer-level Cu-Cu bonding technology. |
Microelectronics Reliability |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | S. L. Lin, W. C. Huang, C. T. Ko, Kuan-Neng Chen |
BCB-to-oxide bonding technology for 3D integration. |
Microelectronics Reliability |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Kuan-Neng Chen, Chuan Seng Tan |
Integration schemes and enabling technologies for three-dimensional integrated circuits. |
IET Computers & Digital Techniques |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Cheng-Ta Ko, Kuan-Neng Chen |
Wafer-level bonding/stacking technology for 3D integration. |
Microelectronics Reliability |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Zheng Xu, Adam Beece, Dingyou Zhang, Qianwen Chen, Kuan-neng Chen, Kenneth Rose, Jian-Qiang Lu |
Crosstalk evaluation, suppression and modeling in 3D through-strata-via (TSV) network. |
3DIC |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Cheng-Ta Ko, Kuan-Neng Chen, Wei-Chung Lo, Chuan-An Cheng, Wen-Chun Huang, Zhi-Cheng Hsiao, Huan-Chun Fu, Yu-Hua Chen |
Wafer-level 3D integration using hybrid bonding. |
3DIC |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Steven J. Koester, Albert M. Young, Roy R. Yu, Sampath Purushothaman, Kuan-Neng Chen, Douglas C. La Tulipe Jr., Narender Rana, Leathen Shi, Matthew R. Wordeman, Edmund J. Sprogis |
Wafer-level 3D integration technology. |
IBM Journal of Research and Development |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Shamik Das, Andy Fan, Kuan-Neng Chen, Chuan Seng Tan, Nisha Checka, Rafael Reif |
Technology, performance, and computer-aided design of three-dimensional integrated circuits. |
ISPD |
2004 |
DBLP DOI BibTeX RDF |
3-D VLSI, routing, placement, layout, 3-D IC, 3-D integration |
| 1 | Rafael Reif, Andy Fan, Kuan-Neng Chen, Shamik Das |
Fabrication Technologies for Three-Dimensional Integrated Circuits (invited). (PDF / PS) |
ISQED |
2002 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #10 of 10 (100 per page; Change: )
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