Search results for "Kurt Keutzer"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Victor Pankratius, Wolfram Schulte, Kurt Keutzer	Guest Editors' Introduction: Parallelism on the Desktop.	IEEE Software	2011	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Peng Li, Li Shang, Hai Zhou	A Special Section on Multicore Parallel CAD: Algorithm Design and Programming.	ACM Trans. Design Autom. Electr. Syst.	2011	DBLP DOI BibTeX RDF
1	Michael Anderson, Bryan C. Catanzaro, Jike Chong, Ekaterina Gonina, Kurt Keutzer, Chao-Yue Lai, Mark Murphy, Bor-Yiing Su, Narayanan Sundaram	PALLAS: Mapping Applications onto Manycore.	Multiprocessor System-on-Chip	2011	DBLP DOI BibTeX RDF
1	Youngmin Yi, Chao-Yue Lai, Slav Petrov, Kurt Keutzer	Efficient Parallel CKY Parsing on GPUs.	IWPT	2011	DBLP BibTeX RDF
1	Bor-Yiing Su, Tasneem G. Brutch, Kurt Keutzer	A parallel region based object recognition system.	WACV	2011	DBLP DOI BibTeX RDF
1	Michael Anderson, Grey Ballard, James Demmel, Kurt Keutzer	Communication-Avoiding QR Decomposition for GPUs.	IPDPS	2011	DBLP DOI BibTeX RDF
1	Narayanan Sundaram, Kurt Keutzer	Long term video segmentation through pixel level spectral clustering on GPUs.	ICCV Workshops	2011	DBLP DOI BibTeX RDF
1	Bryan C. Catanzaro, Michael Garland, Kurt Keutzer	Copperhead: compiling an embedded data parallel language.	PPOPP	2011	DBLP DOI BibTeX RDF
1	Bryan C. Catanzaro, Armando Fox, Kurt Keutzer, David A. Patterson, Bor-Yiing Su, Marc Snir, Kunle Olukotun, Pat Hanrahan, Hassan Chafi	Ubiquitous Parallel Computing from Berkeley, Illinois, and Stanford.	IEEE Micro	2010	DBLP DOI BibTeX RDF	parallel computing, parallel architectures, shared-memory, multicore, hardware, parallel applications, parallel programming environments
1	Bryan C. Catanzaro, Kurt Keutzer	Parallel computing with patterns and frameworks.	ACM Crossroads	2010	DBLP DOI BibTeX RDF
1	Bor-Yiing Su, Tasneem G. Brutch, Kurt Keutzer	Parallel BFS graph traversal on images using structured grid.	ICIP	2010	DBLP DOI BibTeX RDF
1	Narayanan Sundaram, Thomas Brox, Kurt Keutzer	Dense Point Trajectories by GPU-Accelerated Large Displacement Optical Flow.	ECCV	2010	DBLP DOI BibTeX RDF
1	Jike Chong, Ekaterina Gonina, Kisun You, Kurt Keutzer	Exploring recognition network representations for efficient speech inference on highly parallel platforms.	INTERSPEECH	2010	DBLP BibTeX RDF
1	Dorothea Kolossa, Jike Chong, Steffen Zeiler, Kurt Keutzer	Efficient manycore CHMM speech recognition for audiovisual and multistream data.	INTERSPEECH	2010	DBLP BibTeX RDF
1	Kurt Keutzer, Peng Li, Li Shang, Hai Zhou	ACM Transactions on Design Automation of Electronic Systems (TODAES) special section call for papers: Parallel CAD: Algorithm design and programming.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF
1	Krste Asanovic, Rastislav Bodík, James Demmel, Tony Keaveny, Kurt Keutzer, John Kubiatowicz, Nelson Morgan, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel, Katherine A. Yelick	A view of the parallel computing landscape.	Commun. ACM	2009	DBLP DOI BibTeX RDF
1	Nadathur Satish, Narayanan Sundaram, Kurt Keutzer	Optimizing the use of GPU memory in applications with large data sets.	HiPC	2009	DBLP DOI BibTeX RDF
1	Matthew Dixon, Jike Chong, Kurt Keutzer	Acceleration of market value-at-risk estimation.	SC-WHPCF	2009	DBLP DOI BibTeX RDF
1	Bryan C. Catanzaro, Bor-Yiing Su, Narayanan Sundaram, Yunsup Lee, Mark Murphy, Kurt Keutzer	Efficient, high-quality image contour detection.	ICCV	2009	DBLP DOI BibTeX RDF
1	Jike Chong, Kisun You, Youngmin Yi, Ekaterina Gonina, Christopher Hughes, Wonyong Sung, Kurt Keutzer	Scalable HMM based inference engine in large vocabulary continuous speech recognition.	ICME	2009	DBLP DOI BibTeX RDF
1	Mark Murphy, Kurt Keutzer, Hong Wang	Image feature extraction for mobile processors.	IISWC	2009	DBLP DOI BibTeX RDF
1	Jike Chong, Ekaterina Gonina, Youngmin Yi, Kurt Keutzer	A fully data parallel WFST-based large vocabulary continuous speech recognition on a graphics processing unit.	INTERSPEECH	2009	DBLP BibTeX RDF
1	Wen-mei W. Hwu, Kurt Keutzer, Timothy G. Mattson	The Concurrency Challenge.	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Kaushik Ravindran	Technology Mapping.	Encyclopedia of Algorithms	2008	DBLP DOI BibTeX RDF
1	Nadathur Satish, Kaushik Ravindran, Kurt Keutzer	Scheduling task dependence graphs with variable task execution times onto heterogeneous multiprocessors.	EMSOFT	2008	DBLP DOI BibTeX RDF	statistical scheduling, scheduling, simulated annealing, variability, list-scheduling
1	Bryan C. Catanzaro, Kurt Keutzer, Bor-Yiing Su	Parallelizing CAD: a timely research agenda for EDA.	DAC	2008	DBLP DOI BibTeX RDF	parallelization, framework, pattern, manycore
1	Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou	Reinventing EDA with manycore processors.	DAC	2008	DBLP DOI BibTeX RDF	parallelization, CAD, software, multicore, EDA, speedup, manycore
1	Bryan C. Catanzaro, Narayanan Sundaram, Kurt Keutzer	Fast support vector machine training and classification on graphics processors.	ICML	2008	DBLP DOI BibTeX RDF
1	Joel Phillips, Kurt Keutzer, Michael Wrinn	Architecting parallel programs.	ICCAD	2008	DBLP DOI BibTeX RDF
1	David G. Chinnery, Kurt Keutzer	Closing the Power Gap between ASIC and Custom - Tools and Techniques for Low Power Design.		2007	DOI RDF
1	Francine Bacchini, Greg Spirakis, Juan Antonio Carballo, Kurt Keutzer, Aart J. de Geus, Fu-Chieh Hsu, Kazu Yamada	Megatrends and EDA 2017.	DAC	2007	DBLP DOI BibTeX RDF
1	Jike Chong, Nadathur Satish, Bryan C. Catanzaro, Kaushik Ravindran, Kurt Keutzer	Efficient Parallelization of H.264 Decoding with Macro Block Level Scheduling.	ICME	2007	DBLP DOI BibTeX RDF
1	Nadathur Satish, Kaushik Ravindran, Kurt Keutzer	A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multiprocessors.	DATE	2007	DBLP DOI BibTeX RDF
1	Kaushik Ravindran, Nadathur Satish, Yujia Jin, Kurt Keutzer	An FPGA-based Soft Multiprocessor System for IPv4 Packet Forwarding.	FPL	2005	DBLP BibTeX RDF
1	David G. Chinnery, Kurt Keutzer	Linear programming for sizing, Vth and Vdd assignment.	ISLPED	2005	DBLP DOI BibTeX RDF	linear program, delay, power, sizing
1	David G. Chinnery, Kurt Keutzer	Closing the power gap between ASIC and custom: an ASIC perspective.	DAC	2005	DBLP DOI BibTeX RDF	power, energy, custom, ASIC, comparison, standard cell
1	Yujia Jin, William Plishker, Kaushik Ravindran, Nadathur Satish, Kurt Keutzer	Soft multiprocessor systems for network applications (abstract only).	FPGA	2005	DBLP DOI BibTeX RDF
1	Yujia Jin, Nadathur Satish, Kaushik Ravindran, Kurt Keutzer	An automated exploration framework for FPGA-based soft multiprocessor systems.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	IPv4 packet forwarding, soft multiprocessors, FPGA, design space exploration, integer linear programming
1	Scott J. Weber, Kurt Keutzer	Using minimal minterms to represent programmability.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	Boolean function representation, instruction set extraction, Boolean satisfiability
1	Niraj Shah, William Plishker, Kaushik Ravindran, Kurt Keutzer	NP-Click: A Productive Software Development Approach for Network Processors.	IEEE Micro	2004	DBLP DOI BibTeX RDF
1	David G. Chinnery, Kurt Keutzer	Closing the Gap Between ASIC and Custom - Tools and Techniques for High-Performance ASIC Design.		2004	DOI RDF
1	Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer	Static Crosstalk-Noise Analysis - For Deep Sub-Micron Digital Designs.		2004	DOI RDF
1	Christian Sauer, Matthias Gries, José Ignacio Gómez, Scott J. Weber, Kurt Keutzer	Developing a Flexible Interface for RapidIO, Hypertransport, and PCI-Express.	PARELEC	2004	DBLP DOI BibTeX RDF
1	Robert Dahlberg, Kurt Keutzer, R. Bingham, Aart J. de Geus, Walden C. Rhines	EDA: this is serious business.	DAC	2004	DBLP DOI BibTeX RDF
1	Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah	Is statistical timing statistically significant?	DAC	2004	DBLP DOI BibTeX RDF
1	Scott J. Weber, Matthew W. Moskewicz, Matthias Gries, Christian Sauer, Kurt Keutzer	Fast cycle-accurate simulation and instruction set generation for constraint-based descriptions of programmable architectures.	CODES+ISSS	2004	DBLP DOI BibTeX RDF	automatic control generation, instruction set extraction, cycle-accurate simulation
1	David Nguyen, Abhijit Davare, Michael Orshansky, David G. Chinnery, Brandon Thompson, Kurt Keutzer	Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization.	ISLPED	2003	DBLP DOI BibTeX RDF	dual threshold, sizing, dual supply voltage, simultaneous
1	Chidamber Kulkarni, Matthias Gries, Christian Sauer, Kurt Keutzer	Programming challenges in network processor deployment.	CASES	2003	DBLP DOI BibTeX RDF	IPv4 forwarding, programming heterogeneous architectures, mapping, programming model, multi-threading, resource sharing
1	Matthias Gries, Chidamber Kulkarni, Christian Sauer, Kurt Keutzer	Comparing Analytical Modeling with Simulation for Network Processors: A Case Study.	DATE	2003	DBLP DOI BibTeX RDF
1	Masayuki Ito, David G. Chinnery, Kurt Keutzer	Low Power Multiplication Algorithm for Switching Activity Reduction through Operand Decomposition.	ICCD	2003	DBLP DOI BibTeX RDF
1	Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu	Impact of spatial intrachip gate length variability on theperformance of high-speed digital circuits.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
1	Andrew Mihal, Chidamber Kulkarni, Matthew W. Moskewicz, Mel M. Tsai, Niraj Shah, Scott J. Weber, Yujia Jin, Kurt Keutzer, Christian Sauer, Kees A. Vissers, Sharad Malik	Developing Architectural Platforms: A Disciplined Approach.	IEEE Design & Test of Computers	2002	DBLP DOI BibTeX RDF
1	Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh	Design Tools for Application Specific Embedded Processors.	EMSOFT	2002	DBLP DOI BibTeX RDF
1	Pinhong Chen, Yuji Kukimoto, Chin-Chi Teng, Kurt Keutzer	On convergence of switching windows computation in presence of crosstalk noise.	ISPD	2002	DBLP DOI BibTeX RDF
1	Gary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey	Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant?	DAC	2002	DBLP DOI BibTeX RDF
1	Michael Orshansky, Kurt Keutzer	A general probabilistic framework for worst case timing analysis.	DAC	2002	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Michael Orshansky	From blind certainty to informed uncertainty.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF
1	Farhana Sheikh, Andreas Kuehlmann, Kurt Keutzer	Minimum-power retiming for dual-supply CMOS circuits.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF	dual-supply, retiming theory, low-power, synthesis, low-power design
1	Pinhong Chen, Yuji Kukimoto, Kurt Keutzer	Refining switching window by time slots for crosstalk noise calculation.	ICCAD	2002	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Sharad Malik, A. Richard Newton	From ASIC to ASIP: The Next Design Discontinuity.	ICCD	2002	DBLP DOI BibTeX RDF	Programmable platforms, Design methodology, Application Specific Integrated Circuits, ASIC, Application Specific Instruction Set Processors, ASIP
1	Farzan Fallah, Srinivas Devadas, Kurt Keutzer	OCCOM-efficient computation of observability-based code coveragemetrics for functional verification.	IEEE Trans. on CAD of Integrated Circuits and Systems	2001	DBLP DOI BibTeX RDF
1	Farzan Fallah, Srinivas Devadas, Kurt Keutzer	Functional vector generation for HDL models using linearprogramming and Boolean satisfiability.	IEEE Trans. on CAD of Integrated Circuits and Systems	2001	DBLP DOI BibTeX RDF
1	Mukul R. Prasad, Philip Chong, Kurt Keutzer	Why is Combinational ATPG Efficiently Solvable for Practical VLSI Circuits?	J. Electronic Testing	2001	DBLP DOI BibTeX RDF	combinational ATPG, SAT, backtracking, complexity analysis, VLSI circuits
1	Serdar Tasiran, Kurt Keutzer	Coverage Metrics for Functional Validation of Hardware Designs.	IEEE Design & Test of Computers	2001	DBLP DOI BibTeX RDF
1	Pinhong Chen, Kurt Keutzer, Desmond Kirkpatrick	Scripting for EDA Tools: A Case Study.	ISQED	2001	DBLP DOI BibTeX RDF
1	Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli	Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design.	DAC	2001	DBLP DOI BibTeX RDF
1	David G. Chinnery, Borivoje Nikolic, Kurt Keutzer	Achieving 550Mhz in an ASIC Methodology.	DAC	2001	DBLP DOI BibTeX RDF
1	Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutzer, Majid Sarrafzadeh	A Quick Safari Through the Reconfiguration Jungle.	DAC	2001	DBLP DOI BibTeX RDF
1	Bret M. Victor, Kurt Keutzer	Bus Encoding to Prevent Crosstalk Delay.	ICCAD	2001	DBLP BibTeX RDF
1	Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer	A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage.	ICCD	2001	DBLP BibTeX RDF
1	Kurt Keutzer, A. Richard Newton, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli	System-level design: orthogonalization of concerns andplatform-based design.	IEEE Trans. on CAD of Integrated Circuits and Systems	2000	DBLP DOI BibTeX RDF
1	Dennis Sylvester, Kurt Keutzer	A global wiring paradigm for deep submicron design.	IEEE Trans. on CAD of Integrated Circuits and Systems	2000	DBLP DOI BibTeX RDF
1	David G. Chinnery, Kurt Keutzer	Closing the gap between ASIC and custom: an ASIC perspective.	DAC	2000	DBLP DOI BibTeX RDF	custom, ASIC, comparison, clock frequency, clock speed
1	Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer	Switching Window Computation for Static Timing Analysis in Presence of Crosstalk Noise.	ICCAD	2000	DBLP BibTeX RDF
1	Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer	Miller Factor for Gate-Level Coupling Delay Calculation.	ICCAD	2000	DBLP BibTeX RDF
1	Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu	Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits.	ICCAD	2000	DBLP BibTeX RDF
1	Stan Y. Liao, Srinivas Devadas, Kurt Keutzer	A text-compression-based method for code size minimization in embedded systems.	ACM Trans. Design Autom. Electr. Syst.	1999	DBLP DOI BibTeX RDF	code size optimization, compression
1	Dennis Sylvester, Kurt Keutzer	Rethinking Deep-Submicron Circuit Design.	IEEE Computer	1999	DBLP DOI BibTeX RDF
1	Dennis Sylvester, Kurt Keutzer	Getting to the bottom of deep submicron II: a global wiring paradigm.	ISPD	1999	DBLP DOI BibTeX RDF
1	Raul Camposano, Kurt Keutzer, Jerry Fiddler, Alberto L. Sangiovanni-Vincentelli, Jim Lansford	HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night.	DAC	1999	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Kurt Wolf, David Pietromonaco, Jay Maxey, Jeff Lewis, Martin Lefebvre, Jeff Burns	Panel: Cell Libraries - Build vs. Buy; Static vs. Dynamic.	DAC	1999	DBLP DOI BibTeX RDF
1	Mukul R. Prasad, Philip Chong, Kurt Keutzer	Why is ATPG Easy?	DAC	1999	DBLP DOI BibTeX RDF
1	Pinhong Chen, Kurt Keutzer	Towards true crosstalk noise analysis.	ICCAD	1999	DBLP BibTeX RDF
1	Kurt Keutzer, A. Richard Newton	The MARCO/DARPA Gigascale Silicon Research Center.	ICCD	1999	DBLP DOI BibTeX RDF
1	Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang	Code Optimization Techniques in Embedded DSP Microprocessors.	Design Autom. for Emb. Sys.	1998	DBLP DOI BibTeX RDF
1	Stan Y. Liao, Kurt Keutzer, Steven W. K. Tjiang, Srinivas Devadas	A new viewpoint on code generation for directed acyclic graphs.	ACM Trans. Design Autom. Electr. Syst.	1998	DBLP DOI BibTeX RDF	binate covering, code generation, directed acyclic graphs
1	Stan Y. Liao, Srinivas Devadas, Kurt Keutzer	Code density optimization for embedded DSP processors using data compression techniques.	IEEE Trans. on CAD of Integrated Circuits and Systems	1998	DBLP DOI BibTeX RDF
1	Srinivas Devadas, Kurt Keutzer	An algorithmic approach to optimizing fault coverage for BIST logic synthesis.	ITC	1998	DBLP DOI BibTeX RDF
1	Farzan Fallah, Srinivas Devadas, Kurt Keutzer	OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification.	DAC	1998	DBLP DOI BibTeX RDF	high-level synthesis, telecommunication
1	Farzan Fallah, Srinivas Devadas, Kurt Keutzer	Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability.	DAC	1998	DBLP DOI BibTeX RDF	low power, synthesis, placement, flip-flops, voltage scaling, codec, MPEG4, level converters, design automatian
1	Dennis Sylvester, Kurt Keutzer	Getting to the bottom of deep submicron.	ICCAD	1998	DBLP DOI BibTeX RDF	ASIC, power dissipation, signal integrity, interconnect modeling, wirelength, gate delay, CMOS scaling
1	José C. Monteiro, Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer, Jacob K. White	Estimation of average switching activity in combinational logic circuits using symbolic simulation.	IEEE Trans. on CAD of Integrated Circuits and Systems	1997	DBLP DOI BibTeX RDF
1	Kurt Keutzer, A. Richard Newton, Narendra V. Shenoy	The future of logic synthesis and physical design in deep-submicron process geometries.	ISPD	1997	DBLP DOI BibTeX RDF
1	Kurt Keutzer	Challenges in CAD for the One Million Gate FPGA.	FPGA	1997	DBLP DOI BibTeX RDF
1	Srinivas Devadas, Kurt Keutzer	Addendum to "Synthesis of robust delay-fault testable circuits: Theory".	IEEE Trans. on CAD of Integrated Circuits and Systems	1996	DBLP DOI BibTeX RDF
1	Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Steven W. K. Tjiang, Albert Wang	Storage Assignment to Decrease Code Size.	ACM Trans. Program. Lang. Syst.	1996	DBLP DOI BibTeX RDF	compilation, code size, storage assignment
1	Kurt Keutzer, Olivier Coudert, Ramsey W. Haddad	What is the state of the art in commercial EDA tools for low power?	ISLPED	1996	DBLP DOI BibTeX RDF
1	Kurt Keutzer	The Need for Formal Methods for Integrated Circuit Design.	FMCAD	1996	DBLP DOI BibTeX RDF
1	Kurt Keutzer, Sharad Malik	Register Transfer Level Synthesis: From Theory to Practice. (PDF / PS)	VLSI Design	1996	DBLP DOI BibTeX RDF
1	Anantha Chandrakasan, Kurt Keutzer, A. Khandekar, S. L. Maskara, B. D. Pradhan, Mani B. Srivastava	Mobile Communications: Demands on VLSI Technology, Design and CAD. (PDF / PS)	VLSI Design	1996	DBLP DOI BibTeX RDF

Publications of "Kurt Keutzer" ( http://dblp.L3S.de/Authors/Kurt_Keutzer )