Search results for "LCTES"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Ian Gray, Neil C. Audsley	Targeting complex embedded architectures by combining the multicore communications API (mcapi) with compile-time virtualisation.	LCTES	2011	DBLP DOI BibTeX RDF
1	Man Wang, Zhiyuan Li, Feng Li, Xiaobing Feng, Saurabh Bagchi, Yung-Hsiang Lu	Dependence-based multi-level tracing and replay for wireless sensor networks debugging.	LCTES	2011	DBLP DOI BibTeX RDF
1	Christoph Cullmann	Cache persistence analysis: a novel approachtheory and practice.	LCTES	2011	DBLP DOI BibTeX RDF
1	Abdoulaye Gamatié, Laure Gonnord	Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systems.	LCTES	2011	DBLP DOI BibTeX RDF
1	Choonki Jang, Jungwon Kim, Jaejin Lee, Hee-Seok Kim, Dong-Hoon Yoo, Sukjin Kim, Hongseok Kim, Soojung Ryu	An instruction-scheduling-aware data partitioning technique for coarse-grained reconfigurable architectures.	LCTES	2011	DBLP DOI BibTeX RDF
1	Ernst Althaus, Sebastian Altmeyer, Rouven Naujoks	Precise and efficient parametric path analysis.	LCTES	2011	DBLP DOI BibTeX RDF
1	Nicolas Berthier, Florence Maraninchi, Laurent Mounier	Synchronous programming of device drivers for global resource control in embedded operating systems.	LCTES	2011	DBLP DOI BibTeX RDF
1	Suman Saha, Julia L. Lawall, Gilles Muller	An approach to improving the structure of error-handling code in the linux kernel.	LCTES	2011	DBLP DOI BibTeX RDF
1	Samaneh Navabpour, Borzoo Bonakdarpour, Sebastian Fischmeister	Software debugging and testing using the abstract diagnosis theory.	LCTES	2011	DBLP DOI BibTeX RDF
1	Jan Vitek, Bjorn De Sutter (eds.)	Proceedings of the ACM SIGPLAN/SIGBED 2011 conference on Languages, compilers, and tools for embedded systems, LCTES 2011, Chicago, IL, USA, April 11-14, 2011	LCTES	2011	DBLP BibTeX RDF
1	Albert Benveniste, Timothy Bourke, Benoît Caillaud, Marc Pouzet	Divide and recycle: types and compilation for a hybrid synchronous language.	LCTES	2011	DBLP DOI BibTeX RDF
1	Elvira Albert, Puri Arenas, Samir Genaim, Damiano Zanardini	Task-level analysis for a language with async/finish parallelism.	LCTES	2011	DBLP DOI BibTeX RDF
1	Li-Pin Chang, Li-Chun Huang	A low-cost wear-leveling algorithm for block-mapping solid-state disks.	LCTES	2011	DBLP DOI BibTeX RDF
1	Bruno Virlet, Xing Zhou, Jean Pierre Giacalone, Bob Kuhn, María Jesús Garzarán, David A. Padua	Scheduling of stream-based real-time applications for heterogeneous systems.	LCTES	2011	DBLP DOI BibTeX RDF
1	Sudipta Chattopadhyay, Abhik Roychoudhury	Static bus schedule aware scratchpad allocation in multiprocessors.	LCTES	2011	DBLP DOI BibTeX RDF
1	Johnson J. Thomas, Sebastian Fischmeister, Deepak Kumar	Lowering overhead in sampling-based execution monitoring and tracing.	LCTES	2011	DBLP DOI BibTeX RDF
1	Abhik Sarkar, Frank Mueller, Harini Ramaprasad	Predictable task migration for locked caches in multi-core systems.	LCTES	2011	DBLP DOI BibTeX RDF
1	Indu Bhagat, Enric Gibert, F. Jesús Sánchez, Antonio González	Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations.	LCTES	2011	DBLP DOI BibTeX RDF
1	Ines Viskic, Lochi Yu, Daniel Gajski	Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications.	LCTES	2010	DBLP DOI BibTeX RDF	kahn process, transaction level model, automatic generation, process network, process mapping
1	Weijia Li, Youtao Zhang	An efficient code update scheme for DSP applications in mobile embedded systems.	LCTES	2010	DBLP DOI BibTeX RDF	context-aware script, context-unaware script, incremental coalescing general offset assignment (icgoa), incremental coalescing simple offset assignment (icsoa)
1	Sebastian Fischmeister, Yanmeng Ba	Sampling-based program execution monitoring.	LCTES	2010	DBLP DOI BibTeX RDF	embedded system, monitoring, debugging, sampling, tracing
1	Jaejin Lee, Bruce R. Childers (eds.)	Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, LCTES 2010, Stockholm, Sweden, April 13-15, 2010	LCTES	2010	DBLP BibTeX RDF
1	John Robert Wernsing, Greg Stitt	Elastic computing: a framework for transparent, portable, and adaptive multi-core heterogeneous computing.	LCTES	2010	DBLP DOI BibTeX RDF	elastic computing, fpga, multi-core, speedup, heterogeneous architectures
1	Jens Brandt, Klaus Schneider, Sandeep K. Shukla	Translating concurrent action oriented specifications to synchronous guarded actions.	LCTES	2010	DBLP DOI BibTeX RDF	concurrent action-oriented specifications, code generation, synchronous languages, guarded commands
1	Yi Wang, Duo Liu, Meng Wang, Zhiwei Qin, Zili Shao, Yong Guan	RNFTL: a reuse-aware NAND flash translation layer for flash memory.	LCTES	2010	DBLP DOI BibTeX RDF	reuse, flash memory, wear-leveling, endurance, space utilization
1	Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao Zhao	Analysis and approximation for bank selection instruction minimization on partitioned memory architecture.	LCTES	2010	DBLP DOI BibTeX RDF	bank selection instruction minimization, partitioned memory architecture
1	Matthias Biehl, De-Jiu Chen, Martin Törngren	Integrating safety analysis into the model-based development toolchain of automotive embedded systems.	LCTES	2010	DBLP DOI BibTeX RDF	architecture description language, tool integration, model-based development, safety analysis
1	Simon Perathoner, Tobias Rein, Lothar Thiele, Kai Lampka, Jonas Rox	Modeling structured event streams in system level performance analysis.	LCTES	2010	DBLP DOI BibTeX RDF	event count curves, performance analysis, real-time calculus
1	Marc Schlickling, Markus Pister	Semi-automatic derivation of timing models for WCET analysis.	LCTES	2010	DBLP DOI BibTeX RDF	vhdl, worst-case execution time, hard real-time
1	Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek	Operation and data mapping for CGRAs with multi-bank memory.	LCTES	2010	DBLP DOI BibTeX RDF	bank conflict, multi-bank memory, compilation, arbiter, coarse-grained reconfigurable architecture
1	Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul	Cache vulnerability equations for protecting data in embedded processor caches from soft errors.	LCTES	2010	DBLP DOI BibTeX RDF	cache vulnerability, static analysis, embedded processors, soft errors, code transformation, compiler technique
1	Sebastian Altmeyer, Claire Maiza, Jan Reineke	Resilience analysis: tightening the CRPD bound for set-associative caches.	LCTES	2010	DBLP DOI BibTeX RDF	cache-related preemption delay, lru caches, timing analysis
1	Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Sri Hari Krishna Narayanan	Compiler directed network-on-chip reliability enhancement for chip multiprocessors.	LCTES	2010	DBLP DOI BibTeX RDF	reliability, compiler, noc, chip multiprocessors
1	Gwenaël Delaval, Hervé Marchand, Éric Rutten	Contracts for modular discrete controller synthesis.	LCTES	2010	DBLP DOI BibTeX RDF	adaptive and reconfigurable systems, discrete controller synthesis, components, modularity, contracts, reactive systems, synchronous programming
1	Prasad A. Kulkarni, Michael R. Jantz, David B. Whalley	Improving both the performance benefits and speed of optimization phase sequence searches.	LCTES	2010	DBLP DOI BibTeX RDF	genetic algorithms, phase ordering
1	Mohammad H. Foroozannejad, Matin Hashemi, Trevor L. Hodges, Soheil Ghiasi	Look into details: the benefits of fine-grain streaming buffer analysis.	LCTES	2010	DBLP DOI BibTeX RDF	synchronous data flow, optimization, buffer management, software synthesis, streaming applications
1	Robert Pyka, Felipe Klein, Peter Marwedel, Stylianos Mamagkakis	Versatile system-level memory-aware platform description approach for embedded MPSoCs.	LCTES	2010	DBLP DOI BibTeX RDF	framework, component, configuration, channel, definition, energy models, architecture description
1	Eric Stotzer, Ernst L. Leiss	Modulo scheduling without overlapped lifetimes.	LCTES	2009	DBLP DOI BibTeX RDF	instruction level parallelism, register allocation, software pipelining, modulo scheduling
1	Stephen Roderick Hines, Yuval Peress, Peter Gavin, David B. Whalley, Gary S. Tyson	Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE).	LCTES	2009	DBLP DOI BibTeX RDF	l0/filter cache, lookahead instruction fetch engine (life), tagless hit instruction cache (th-ic)
1	Abhishek Udupa, R. Govindarajan, Matthew J. Thazhuthaveetil	Synergistic execution of stream programs on multicores with accelerators.	LCTES	2009	DBLP DOI BibTeX RDF	CUDAa, partitioning, software pipelining, stream programming, GPU programming
1	Taewook Oh, Bernhard Egger, Hyunchul Park, Scott A. Mahlke	Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures.	LCTES	2009	DBLP DOI BibTeX RDF	software pipelining, placement and routing, coarse-grained reconfigurable architectures
1	Giovani Gracioli, Sebastian Fischmeister	Tracing interrupts in embedded software.	LCTES	2009	DBLP DOI BibTeX RDF	real-time systems, debugging, tracing, embedded software
1	Jongeun Lee, Aviral Shrivastava	A compiler optimization to reduce soft errors in register files.	LCTES	2009	DBLP DOI BibTeX RDF	architectural vulnerability factor, link-time optimization, embedded system, compilation, static analysis, soft error, register file
1	Hugh Leather, Michael F. P. O'Boyle, Bruce Worton	Raced profiles: efficient selection of competing compiler optimizations.	LCTES	2009	DBLP DOI BibTeX RDF	statistics, iterative compilation
1	Charles André, Frédéric Mallet	Specification and verification of time requirements with CCSL and Esterel.	LCTES	2009	DBLP DOI BibTeX RDF	synchronous languages, uml, marte, time model
1	Sandrine Blazy, Benoît Robillard	Live-range unsplitting for faster optimal coalescing.	LCTES	2009	DBLP DOI BibTeX RDF	register allocation, graph reduction, coalescing
1	Abhik Sarkar, Frank Mueller, Harini Ramaprasad, Sibin Mohan	Push-assisted migration of real-time tasks in multi-core processors.	LCTES	2009	DBLP DOI BibTeX RDF	task migration., real-time systems, timing analysis, multi-core architectures
1	Ryan W. Moore, José Baiocchi, Bruce R. Childers, Jack W. Davidson, Jason Hiser	Addressing the challenges of DBT for the ARM architecture.	LCTES	2009	DBLP DOI BibTeX RDF	virtualization, dynamic binary translation, arm
1	Christoph M. Kirsch, Mahmut T. Kandemir (eds.)	Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, LCTES 2009, Dublin, Ireland, June 19-20, 2009	LCTES	2009	DBLP BibTeX RDF
1	Paul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede	Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring.	LCTES	2009	DBLP DOI BibTeX RDF	fpga, monitoring, debug, transaction, instrumentation
1	Colin J. Fidge, Diane Corney	Integrating hardware and software information flow analyses.	LCTES	2009	DBLP DOI BibTeX RDF	communications devices, information security evaluation, embedded software
1	Paul Caspi, Jean-Louis Colaço, Léonard Gérard, Marc Pouzet, Pascal Raymond	Synchronous objects with scheduling policies: introducing safe shared memory in lustre.	LCTES	2009	DBLP DOI BibTeX RDF	real-time systems, compilation, semantics, type systems, synchronous languages, block-diagrams
1	Thomas Heinz, Reinhard Wilhelm	Towards device emulation code generation.	LCTES	2009	DBLP DOI BibTeX RDF	bit vector arithmetic, device emulation, code generation, binary translation, satisfiability modulo theories
1	Xuejun Yang, Nathan Cooprider, John Regehr	Eliminating the call stack to save RAM.	LCTES	2009	DBLP DOI BibTeX RDF	stack liveness, sensor networks, compiler optimization, embedded software, memory allocation, memory optimizations
1	Jia Zou, Joshua S. Auerbach, David F. Bacon, Edward A. Lee	PTIDES on flexible task graph: real-time embedded systembuilding from theory to practice.	LCTES	2009	DBLP DOI BibTeX RDF	flexible task graphs, jitter elimination, ptides, real-time systems, real-time scheduling
1	Jennifer Mankin, David R. Kaeli, John Ardini	Software transactional memory for multicore embedded systems.	LCTES	2009	DBLP DOI BibTeX RDF	embedded systems, synchronization, transactions, multicore, locking, software transactional memory (stm)
1	Ryan Newton, Lewis Girod, Michael B. Craig, Samuel Madden, J. Gregory Morrisett	Design and evaluation of a compiler for embedded stream programs.	LCTES	2008	DBLP DOI BibTeX RDF	stream processing language, sensor networks
1	Dariusz Biernacki, Jean-Louis Colaço, Grégoire Hamon, Marc Pouzet	Clock-directed modular code generation for synchronous data-flow languages.	LCTES	2008	DBLP DOI BibTeX RDF	real-time systems, compilation, semantics, type systems, synchronous languages
1	Li Wang, Xuejun Yang, Jingling Xue, Yu Deng, Xiaobo Yan, Tao Tang, Quan Hoang Nguyen	Optimizing scientific application loops on stream processors.	LCTES	2008	DBLP DOI BibTeX RDF	streaming, prefetching, graph coloring, data reuse, loop optimization, stream processor, software-managed cache
1	Mounira Bachir, Sid Ahmed Ali Touati, Albert Cohen	Post-pass periodic register allocation to minimise loop unrolling degree.	LCTES	2008	DBLP DOI BibTeX RDF	embedded code optimisation, periodic register allocation, software pipelining, loop unrolling
1	Jaejin Lee, Junghyun Kim, Choonki Jang, Seungkyun Kim, Bernhard Egger, Kwangsub Kim, Sangyong Han	FaCSim: a fast and cycle-accurate architecture simulator for embedded systems.	LCTES	2008	DBLP DOI BibTeX RDF	virtual prototyping, architecture simulator, full-system simulation, simulator parallelization, cycle-accurate simulation
1	Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum	Impact of JVM superoperators on energy consumption in resource-constrained embedded systems.	LCTES	2008	DBLP DOI BibTeX RDF	superoperators, embedded systems, java virtual machine, energy estimation, profile-guided optimization
1	Krisztián Flautner, John Regehr (eds.)	Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'08), Tucson, AZ, USA, June 12-13, 2008	LCTES	2008	DBLP BibTeX RDF
1	Bjorn De Sutter, Paul Coene, Tom Vander Aa, Bingfeng Mei	Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays.	LCTES	2008	DBLP DOI BibTeX RDF	register allocation, placement and routing, coarse-grained, reconfigurable arrays
1	Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan	A domain specific interconnect for reconfigurable computing.	LCTES	2008	DBLP DOI BibTeX RDF	coarse grain reconfiguration, fpga, silicon compilation
1	Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil Dutt, Yunheung Paek, SunJun Ko	Compiler driven data layout optimization for regular/irregular array access patterns.	LCTES	2008	DBLP DOI BibTeX RDF	compiler, memory hierarchy, energy consumption, data placement
1	Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum	Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors.	LCTES	2008	DBLP DOI BibTeX RDF	energy-delay, out-of-order embedded processor, resource resizing, performance, architecture
1	Jan Reineke, Daniel Grund	Relative competitive analysis of cache replacement policies.	LCTES	2008	DBLP DOI BibTeX RDF	wcet analysis, predictability, worst-case execution time, cache performance, replacement policy
1	Gwenaël Delaval, Alain Girault, Marc Pouzet	A type system for the automatic distribution of higher-order synchronous dataflow programs.	LCTES	2008	DBLP DOI BibTeX RDF	distribution, functional programming, type systems, synchronous programming
1	Dietmar Ebner, Florian Brandner, Bernhard Scholz, Andreas Krall, Peter Wiedermann, Albrecht Kadlec	Generalized instruction selection using SSA-graphs.	LCTES	2008	DBLP DOI BibTeX RDF	pbqp, compiler, code generation, instruction selection
1	Madhukar Anand, Insup Lee	Robust and sustainable schedulability analysis of embedded software.	LCTES	2008	DBLP DOI BibTeX RDF	robust schedulability analysis, sustainable schedulability analysis, schedulability analysis
1	Norman H. Cohen, Karl Trygve Kalleberg	EventScript: an event-processing language based on regular expressions with actions.	LCTES	2008	DBLP DOI BibTeX RDF	sensors, regular expressions, actuators, event processing, reactive programs
1	Seong-Won Lee, Soo-Mook Moon, Seong-Moo Kim	Enhanced hot spot detection heuristics for embedded java just-in-time compilers.	LCTES	2008	DBLP DOI BibTeX RDF	hot spot detection, j2me cdc, java just-in-time compilation, sun's hotspot heuristic, java virtual machine
1	Joshua S. Auerbach, David F. Bacon, Rachid Guerraoui, Jesper Honig Spring, Jan Vitek	Flexible task graphs: a unified restricted thread programming model for java.	LCTES	2008	DBLP DOI BibTeX RDF	real-time systems, memory management, java virtual machine, ownership types
1	Qin Wang, Junpu Chen, Weihua Zhang, Min Yang, Binyu Zang	Optimizing software cache performance of packet processing applications.	LCTES	2007	DBLP DOI BibTeX RDF	optimization, network processor, local memory
1	Santosh Pande, Zhiyuan Li (eds.)	Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007	LCTES	2007	DBLP BibTeX RDF
1	Ke Ning, David R. Kaeli	External memory page remapping for embedded multimedia systems.	LCTES	2007	DBLP DOI BibTeX RDF	memory coloring, memory page remapping, embedded systems, memory controllers
1	Stephen Roderick Hines, Gary S. Tyson, David B. Whalley	Addressing instruction fetch bottlenecks by using an instruction register file.	LCTES	2007	DBLP DOI BibTeX RDF	L0/filter cache, instruction packing, instruction register file
1	Pratibha Permandla, Michael Roberson, Chandrasekhar Boyapati	A type system for preventing data races and deadlocks in the java virtual machine language: 1.	LCTES	2007	DBLP DOI BibTeX RDF	SafeJava, deadlocks, data races, ownership types
1	Po-Kuan Huang, Matin Hashemi, Soheil Ghiasi	Joint throughput and energy optimization for pipelined execution of embedded streaming applications.	LCTES	2007	DBLP DOI BibTeX RDF	embedded soft-ware synthesis, multi-core, performance optimization, task graph
1	Daniel Kästner	Safe worst-case execution time analysis by abstract interpretation of executable code.	LCTES	2007	DBLP DOI BibTeX RDF
1	Richard Vincent Bennett, Alastair Colin Murray, Björn Franke, Nigel P. Topham	Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems.	LCTES	2007	DBLP DOI BibTeX RDF	source-level transformations, compilers, design space exploration, ASIPs, instruction set extension, customizable processors
1	Tai-Yi Huang, Pin-Chuan Chou, Cheng-Han Tsai, Hsin-An Chen	Automated fault localization with statistically suspicious program states.	LCTES	2007	DBLP DOI BibTeX RDF	fault localization, automated debugging, state coverage
1	Minwook Ahn, Jooyeon Lee, Yunheung Paek	Optimistic coalescing for heterogeneous register architectures.	LCTES	2007	DBLP DOI BibTeX RDF	heterogeneous register architecture, register coalesing, compiler, register allocation, embedded processors
1	Shan Yan, Bill Lin	Stream execution on wide-issue clustered VLIW architectures.	LCTES	2007	DBLP DOI BibTeX RDF	scheduling, compilers, VLIW processors, stream programming
1	Jihyun In, Ilhoon Shin, Hyojun Kim	SWL: a search-while-load demand paging scheme with NAND flash memory.	LCTES	2007	DBLP DOI BibTeX RDF	page fault handler, parallelization, NAND flash memory, demand paging, page replacement
1	Jun Yan, Wei Zhang 0002	WCET analysis of instruction caches with prefetching.	LCTES	2007	DBLP DOI BibTeX RDF	instruction cache, hard real-time, worst-case execution time analysis, instruction prefetching
1	Michael L. Chu, Scott A. Mahlke	Code and data partitioning for fine-grain parallelism.	LCTES	2007	DBLP DOI BibTeX RDF	code and data partitioning, multicore compilation, fine-grain parallelism
1	Karsten Walther, René Herzog, Jörg Nolte	Analyzing the real-time behaviour of deeply embedded event driven systems.	LCTES	2007	DBLP DOI BibTeX RDF	real-time, profiling, embedded, event-flow
1	Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlke	Compiler-managed partitioned data caches for low power.	LCTES	2007	DBLP DOI BibTeX RDF	hardware/software co-managed cache, instruction-driven cache management, partitioned cache, low-power, embedded processor
1	Hyungmin Cho, Bernhard Egger, Jaejin Lee, Heonshik Shin	Dynamic data scratchpad memory management for a memory subsystem with an MMU.	LCTES	2007	DBLP DOI BibTeX RDF	horizontally-partitioned memory, post-pass optimization, compilers, scratchpad memory, demand paging
1	Joshua S. Auerbach, David F. Bacon, Daniel T. Iercan, Christoph M. Kirsch, V. T. Rajan, Harald Röck, Rainer Trummer	Java takes flight: time-portable real-time programming with exotasks.	LCTES	2007	DBLP DOI BibTeX RDF	time-portability, virtual machine, real-time scheduling, UAVs
1	Yifan Zhu, Frank Mueller	DVSleak: combining leakage reduction and voltage scaling in feedback EDF scheduling.	LCTES	2007	DBLP DOI BibTeX RDF	scheduling, real-time systems, dynamic voltage scaling, leakage, feedback control
1	Ines Viskic, Samar Abdi, Daniel D. Gajski	Automatic generation of embedded communication SW for heterogeneous MPSoC platforms.	LCTES	2007	DBLP DOI BibTeX RDF	custom communication SW, pin/cycle accurate models, MPSoC, system level design, transaction level models, platform based design, automatic synthesis, on-chip communication
1	Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Young-Jia Lin, Yi-Ping You, Chia-Han Lu, Jenq Kuen Lee	Enabling compiler flow for embedded VLIW DSP processors with distributed register files.	LCTES	2007	DBLP DOI BibTeX RDF	distributed register files, embedded VLIW DSP compilers, software pipelining
1	Florent Bouchez, Alain Darte, Fabrice Rastello	On the complexity of spill everywhere under SSA form.	LCTES	2007	DBLP DOI BibTeX RDF	spill, complexity, register allocation, SSA form
1	Weifeng Xu, Russell Tessier	Tetris: a new register pressure control technique for VLIW processors.	LCTES	2007	DBLP DOI BibTeX RDF	register pressure control, very long instruction word (VLIW) processor, instruction level parallelism
1	Hansu Cho, Samar Abdi, Daniel Gajski	Interface synthesis for heterogeneous multi-core systems from transaction level models.	LCTES	2007	DBLP DOI BibTeX RDF	HW-SW co-design, universal bridge, channel, transaction level model, communication synthesis, interface synthesis
1	Xiliang Zhong, Cheng-Zhong Xu	Frequency-aware energy optimization for real-time periodic and aperiodic tasks.	LCTES	2007	DBLP DOI BibTeX RDF	real-time systems, dynamic voltage scaling, dynamic power management, power-aware scheduling
1	Filip Pizlo, Antony L. Hosking, Jan Vitek	Hierarchical real-time garbage collection.	LCTES	2007	DBLP DOI BibTeX RDF	Java memory management, real time systems

Publications at "LCTES"( http://dblp.L3S.de/Venues/LCTES )