| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yahya Jan, Lech Józwiak |
Communication and Memory Architecture Design of Application-Specific High-End Multiprocessors.  |
VLSI Design  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Michal Bryk, Lech Józwiak, Wieslaw Kuzmicz |
Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Solon Nery, Lech Józwiak, Menno Lindwer, Mauro Cocco, Nadia Nedjah, Felipe M. G. França |
Hardware Reuse in Modern Application-Specific Processors and Accelerators. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak |
A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations. |
DSD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Advanced Architectures for Highly-demanding Embedded and Pervasive Applications. |
PECCS |
2011 |
DBLP BibTeX RDF |
|
| 1 | Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França, Lech Józwiak |
Massively Parallel Identification of Intersection Points for GPGPU Ray Tracing. |
ICA3PP |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak |
A parallel architecture for ray-tracing with an embedded intersection algorithm. |
ISCAS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Menno Lindwer |
Issues and Challenges in Development of Massively-Parallel Heterogeneous MPSoCs Based on Adaptable ASIPs. |
PDP |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Nadia Nedjah, Miguel Figueroa |
Modern development methods and tools for embedded reconfigurable systems: A survey. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Yahya Jan |
Quality-driven methodology for demanding accelerator design. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Yahya Jan |
Architecture Design of Reconfigurable Accelerators for Demanding Applications. |
ITNG |
2010 |
DBLP DOI BibTeX RDF |
reconfigurable accelerators, advanced applications, design-space exploration, architecture design |
| 1 | Lech Józwiak |
Quality-driven SoC architecture synthesis for embedded applications. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Nadia Nedjah |
Modern Architectures for Embedded Reconfigurable Systems - a Survey. |
Journal of Circuits, Systems, and Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yahya Jan, Lech Józwiak |
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey. |
SAMOS |
2009 |
DBLP DOI BibTeX RDF |
RC hardware architectures, UHDTV, H.264/AVC, video compression, accelerators, multimedia processing, CABAC |
| 1 | Yahya Jan, Lech Józwiak |
Survey of Advanced CABAC Accelerator Architectures for Future Multimedia. |
ARC |
2009 |
DBLP DOI BibTeX RDF |
RC hardware architectures, UHDTV, H.264/AVC, video compression, accelerators, multimedia processing, CABAC |
| 1 | Lech Józwiak, Sien-An Ong |
Quality-driven model-based architecture synthesis for real-time embedded SoCs. |
Journal of Systems Architecture - Embedded Systems Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Venkatesan Muthukumar, Lech Józwiak |
Editorial. |
Journal of Systems Architecture - Embedded Systems Design |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk |
High-Quality Circuit Synthesis for Modern Technologies. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
nano CMOS technologies, high-speed and low-power circuits, information-driven synthesis, multi-objective optimization, circuit synthesis |
| 1 | Lech Józwiak, Alexander Douglas |
Hardware Synthesis for Reconfigurable Heterogeneous Pipelined Accelerators. |
ITNG |
2008 |
DBLP DOI BibTeX RDF |
re-configurable computing, heterogeneous pipelined accelerators, hardware synthesis, EDA-tool |
| 1 | Lech Józwiak, Szymon Bieganski |
Technology Library Modelling for Information-driven Circuit Synthesis. |
DSD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Srikanth Venkataraman, Nagesh Nagapalli, Lech Józwiak |
Quality Driven Manufacturing and SOC Designs. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Quality-Driven Architecture Synthesis and Power Aware Design of Embedded SoCs. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk |
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems. |
ICSAMOS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Life-Inspired Systems and Their Quality-Driven Design. |
ARCS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Aleksander Slusarczyk, Dominik Gawlowski |
Multi-objective Optimal FSM State Assignment. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Sien-An Ong |
Quality-Driven Template-Based Architecture Synthesis for Real-time Embedded SoCs. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Szymon Bieganski, Artur Chojnacki |
Information-driven circuit synthesis with the pre-characterized gate libraries. |
Journal of Systems Architecture |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Henry Selvaraj, Lech Józwiak |
Reconfigurable embedded systems: Synthesis, design and application. |
Journal of Systems Architecture |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Kaustav Banerjee |
Plenary Session 2P. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Szymon Bieganski |
High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Life-Inspired Systems: Assuring Quality in the Era of Complexity, invited. |
IWSOC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Aleksander Slusarczyk |
General decomposition of incompletely specified sequential machines with multi-state behavior realization. |
Journal of Systems Architecture |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Szymon Bieganski |
Information Trans-Coders in Information-Driven Circuit Synthesis. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Dominik Gawlowski, Aleksander Slusarczyk |
An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Life-Inspired Systems. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
Life-inspired Systems, Silicon and System Complexity, Embedded Systems, System on Chip, Design Methodology, System in Package |
| 1 | Lech Józwiak, Artur Chojnacki |
Effective and efficient FPGA synthesis through general functional decomposition. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martyn Edwards, Lech Józwiak |
Preface. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Aleksander Slusarczyk, Artur Chojnacki |
Fast and compact sequential circuits for the FPGA-based reconfigurable systems. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Martyn Edwards, Lech Józwiak |
Special-issue on reconfigurable systems. |
Journal of Systems Architecture |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Advanced AI Search Techniques in Modern Digital Circuit Synthesis. |
Artif. Intell. Rev. |
2003 |
DBLP DOI BibTeX RDF |
automated design problem solving, double-beam search, genetic engineering algorithm, quick scan, artificial intelligence, heuristic search, circuit synthesis |
| 1 | Lech Józwiak, Szymon Bieganski, Artur Chojnacki |
Information-driven Library-based Circuit Synthesis. |
DSD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak |
Learning Hardware Using Multiple-Valued Logic, Part 2: Cube Calculus and Architecture. |
IEEE Micro |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek A. Perkowski, David Foote, Qihong Chen, Anas Al-Rabadi, Lech Józwiak |
Learning Hardware Using Multiple-Valued Logic, Part 1: Introduction and Approach. |
IEEE Micro |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Adam Postula |
Genetic engineering versus natural evolution: Genetic algorithms with deterministic operators. |
Journal of Systems Architecture |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Aleksander Slusarczyk, Lech Józwiak |
Interoperability and Quality of New EDA Tools for Sequential Logic Synthesis. (PDF / PS) |
ISQED |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek A. Perkowski, Lech Józwiak, W. Zhao |
Symbolic two-dimensional minimization of strongly unspecified finite state machines. |
Journal of Systems Architecture |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Modern methods and tools in digital system design. |
Journal of Systems Architecture |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariusz Rawski, Lech Józwiak, Tadeusz Luba |
Functional decomposition with an efficient input support selection for sub-functions based on information relationship measures. |
Journal of Systems Architecture |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Quality-driven design in the system-on-a-chip era: Why and how? |
Journal of Systems Architecture |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Artur Chojnacki, Lech Józwiak |
High-quality FPGA Designs through Functional Decomposition with Sub-function Input Support Selection Based on Information Relationship Measures. |
ISQED |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek A. Perkowski, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Bart Massey, Pawel Kerntopf, Andrzej Buller, Lech Józwiak, Alan J. Coppola |
Regular Realization of Symmetric Functions Using Reversible Logic. |
DSD |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Artur Chojnacki |
Effective and Efficient FPGA Synthesis through Functional Decomposition Based on Information Relationship Measures. |
DSD |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Artur Chojnacki, Aleksander Slusarczyk |
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis. |
DSD |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Artur Chojnacki |
High-quality sub-function construction in functional decomposition based on information relationship measures. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Quality-Driven System-on-a-Chip Design. |
ISQED |
2000 |
DBLP DOI BibTeX RDF |
quality-driven design, design methodologies, design methods, system-on-a-chip, design reuse, design modeling, design exploration, design validation, EDA tools |
| 1 | Artur Chojnacki, Lech Józwiak |
Multi-Valued Sub-Function Encoding in Functional Decomposition Based on Information Relationships Measures. (PDF / PS) |
ISMVL |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Aleksander Slusarczyk |
A New State Assignment Method Targeting FPGA Implementations. |
EUROMICRO |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Adam Postula |
Genetic Engineering versus Natural Evolution Genetic Algorithms with Deterministic Operators. |
IC-AI |
1999 |
DBLP BibTeX RDF |
|
| 1 | Lech Józwiak |
Information Relationships and Measures in Application to Logic Design. (PDF / PS) |
ISMVL |
1999 |
DBLP DOI BibTeX RDF |
relationships and measures, logic design, information, information modeling, digital systems, functional decomposition |
| 1 | Lech Józwiak |
Digital System Design: Architectures, Methods and Tools. (PDF / PS) |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafal Rzechowski, Tadeusz Luba, Lech Józwiak |
Technology Driven Multilevel Logic Synthesis Based on Functional Decomposition into Gates. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariusz Rawski, Lech Józwiak, Tadeusz Luba |
The Influence of the Number of Values in Sub-Functions on the Effectiveness and Efficiency of the Functional Decomposition. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Artur Chojnacki |
Functional Decomposition based on Information Relationship Measures Extremely Effective and Efficient for Symmetric Functions. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Song Chen, Adam Postula, Lech Józwiak |
Synthesis of XOR Storage Schemes with Different Cost for Minimization of Memory Contention. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Torrey Lewis, Marek A. Perkowski, Lech Józwiak |
Learning in Hardware: Architecture and Implementation of an FPGA-Based Rough Set Machine. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariusz Rawski, Lech Józwiak, Tadeusz Luba |
Efficient Input Support Selection for Sub-functions in Functional Decomposition Based on Information Relationship Measures. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Analysis and Synthesis of Information Systems with Information Relationships and Measures. |
Rough Sets and Current Trends in Computing |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariusz Rawski, Lech Józwiak, Artur Chojnacki |
Application of the Information Measures to Input Support Selection in Functional Decomposition. |
Rough Sets and Current Trends in Computing |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam Postula, Song Chen, Lech Józwiak, David Abramson |
Automated Synthesis of Interleaved Memory Systems for Custom Computing Machine. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Burns, Marek A. Perkowski, Lech Józwiak |
An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki |
Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. (PDF / PS) |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak, Niek Ederveen, Adam Postula |
Solving Synthesis Problems with Genetic Algorithms. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Loc Bao Nguen, Marek A. Perkowski, Lech Józwiak |
Design of Self-Synchronized Component FSMs for Self-Timed Systems. |
EUROMICRO |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Marek A. Perkowski, Malgorzata Marek-Sadowska, Lech Józwiak, Tadeusz Luba, Stan Grygiel, Miroslawa Nowicka, Rahul Malvi, Zhi Wang, Jin S. Zhang |
Decomposition of Multiple-Valued Relations . (PDF / PS) |
ISMVL |
1997 |
DBLP DOI BibTeX RDF |
multiple-valued relations decomposition, cofactor pair compatibility, group compatibility, strongly unspecified data, program GUD-MV, machine learning, learning (artificial intelligence) |
| 1 | Stan Grygiel, Marek A. Perkowski, Malgorzata Marek-Sadowska, Tadeusz Luba, Lech Józwiak |
Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations. (PDF / PS) |
ISMVL |
1997 |
DBLP DOI BibTeX RDF |
cube diagram bundles, strongly unspecified multiple-valued functions, multiple-valued decomposers, multiple-valued relations, rough partition representation, machine learning, learning (artificial intelligence), function representation |
| 1 | Sanof Mohamed, Marek A. Perkowski, Lech Józwiak |
Fast Minimization Of Multi-Output Boolean Functions In Sum-Of-Condition-Decoders Structures. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Information Relationships and Measures An Analysis Apparatus for Efficient Information System Synthesis. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
On the use of term trees for effective and efficient test pattern generation. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
term trees, structural automatic test pattern generation, fault discovery, structural fault model, term tree based ATPG algorithm, nonredundant faults, minimal test set, circuit redundancy, logic design, fault model, data representation, automatic test software |
| 1 | Sien-An Ong, Kari Tiensyrjä, Lech Józwiak |
Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
interactive codesign, real-time embedded control systems, task graph generation, InCo, textual functional specification method, linear control structures, static behavioral analysis, graphical functional specification method, high level synthesis, finite-state machines, VHDL, modular design, hierarchical decomposition, hardware software partitioning, cost-efficient |
| 1 | Lech Józwiak, Sien-An Ong |
Quality-Driven Decision Making Methodology for System-Level Design. |
EUROMICRO |
1996 |
DBLP DOI BibTeX RDF |
decision making methodology, application oriented embedded systems, quality-driven decision making, real-time systems, design space exploration, system-level design, decision models |
| 1 | Lech Józwiak, Hein Mijland |
On the use of OR-BDDs for test generation. |
Microprocessing and Microprogramming |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | Lech Józwiak |
Efficent suboptimal state assignment for large sequential machines. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
|
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