Search results for "Leland Chang"

Found 9 publication records. Showing 9 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Leland Chang, Michael Clinton	Session 13 overview: High-performance embedded SRAM: Memory subcommittee.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan	A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Chris H. Kim, Leland Chang	Guest editors' introduction: Nanoscale Memories Pose Unique Challenges.	IEEE Design & Test of Computers	2011	DBLP DOI BibTeX RDF
1	Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D. Parker, Steven K. Esser, Robert K. Montoye, Bipin Rajendran, José A. Tierno, Leland Chang, Dharmendra S. Modha, Daniel J. Friedman	A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.	CICC	2011	DBLP DOI BibTeX RDF
1	Nicky Lu, Leland Chang, Daisaburo Takashima	Future system and memory architectures: Transformations by technology and applications.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Gary S. Ditlow, Robert K. Montoye, Salvatore N. Storino, Sherman M. Dance, Sebastian Ehrenreich, Bruce M. Fleischer, Thomas W. Fox, Kyle M. Holmes, Junichi Mihara, Yutaka Nakamura, Shohji Onishi, Robert Shearer, Dieter Wendel, Leland Chang	A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation.	ISSCC	2011	DBLP DOI BibTeX RDF
1	Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha Chandrakasan	A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw	Low power circuit design based on heterojunction tunneling transistors (HETTs).	ISLPED	2009	DBLP DOI BibTeX RDF	SRAM design, low power applications, tunneling transistor
1	Scott Hanson, Bo Zhai, Kerry Bernstein, David Blaauw, Andres Bryant, Leland Chang, Koushik K. Das, Wilfried Haensch, Edward J. Nowak, Dennis Sylvester	Ultralow-voltage, minimum-energy CMOS.	IBM Journal of Research and Development	2006	DBLP DOI BibTeX RDF

Publications of "Leland Chang" ( http://dblp.L3S.de/Authors/Leland_Chang )