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Publications of "Liang-Bi Chen" ( http://dblp.L3S.de/Authors/Liang-Bi_Chen )

  Author page on DBLP  Author page in RDF  Community of Liang-Bi Chen in ASPL-2

Publication years (Num. hits)
2006-2011 (12)
Publication types (Num. hits)
article(4) inproceedings(8)
Venues (Conferences, Journals, ...)
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Results
Found 12 publication records. Showing 12 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Katherine Shu-Min Li, Chih-Yun Pai, Liang-Bi Chen Maximal Interconnect Resilient Methodology for Fault Tolerance, Yield, and Reliability Improvement in Network on Chip. Search on Bibsonomy IEICE Transactions The full citation details ... 2011 DBLP  BibTeX  RDF
1Liang-Bi Chen, Yen-Ling Chen, Ing-Jer Huang A Real-Time Power Analysis Platform for Power-Aware Embedded System Development. Search on Bibsonomy J. Inf. Sci. Eng. The full citation details ... 2011 DBLP  BibTeX  RDF
1Chih-Yun Pai, Ruei-Ting Gu, Bo-Chuan Cheng, Liang-Bi Chen, Katherine Shu-Min Li A Unified Interconnects Testing Scheme for 3D Integrated Circuits. Search on Bibsonomy Asian Test Symposium The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Yi-Xue Zheng, Po-Ping Kan, Liang-Bi Chen, Kai-Yang Hsieh, Bo-Chuan Cheng, Katherine Shu-Min Li Fault tolerant application-specific NoC topology synthesis for three-dimensional integrated circuits. Search on Bibsonomy SoCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Liang-Bi Chen, Jiun-Cheng Ju, Chien-Chou Wang, Ing-Jer Huang HPChecker: An AMBA AHB On-Chip Bus Protocol Checker with Efficient Verification Mechanisms. Search on Bibsonomy IEICE Transactions The full citation details ... 2010 DBLP  BibTeX  RDF
1Liang-Bi Chen, Tsung-Yu Ho, Jiun-Cheng Ju, Cheng-Lung Chiang, Chung-Nan Lee, Ing-Jer Huang An embedded debugging/performance monitoring engine for a tile-based 3D graphics SoC development. Search on Bibsonomy ASP-DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Liang-Bi Chen, Chi-Tsai Yeh, Hung-Yu Chen, Ing-Jer Huang A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement. Search on Bibsonomy IEICE Transactions The full citation details ... 2009 DBLP  BibTeX  RDF
1Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Liang-Bi Chen, Yung-Chih Liu, Chen-Hung Chen, Chung-Fu Kao, Ing-Jer Huang Parameterized embedded in-circuit emulator and its retargetable debugging software for microprocessor/microcontroller/DSP processor. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Chung-Ping Young, Chung-Chu Chia, Liang-Bi Chen, Ing-Jer Huang NCPA: A Scheduling Algorithm for Multi-cipher and Multi-mode Reconfigurable Cryptosystem. Search on Bibsonomy IIH-MSP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multiple cipher, scheduling algorithm, Cryptosystem, operation mode, crypto-coprocessor
1Liang-Bi Chen, Ching-Chi Hu, Yen-Ling Chen, Chi-Wei Chu, Ing-Jer Huang The AES Design Space Exploration with a Soft IP Generator. Search on Bibsonomy IIH-MSP The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Liang-Bi Chen, Ing-Jer Huang, Yuan-Long Jeang Design of a Dynamic PCM Selector for Non-deterministic Environment. Search on Bibsonomy APCCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
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