| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jen-Yi Wuu, Mark Simmons, Malgorzata Marek-Sadowska |
Post-placement lithographic hotspot detection and removal in one-dimensional gridded designs.  |
ISQED  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiang Qiu, Malgorzata Marek-Sadowska, Wojciech Maly |
Vertical Slit Field Effect Transistor in ultra-low power applications. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska |
Power Delivery for Multicore Systems. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
Performance Optimization Using Variable-Latency Design Style. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska |
Reliability Analysis and Optimization of Power-Gated ICs. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jen-Yi Wuu, Fedor G. Pikus, Malgorzata Marek-Sadowska |
Metrics for characterizing machine learning-based hotspot detection methods. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Malgorzata Marek-Sadowska |
On old and new routing problems. |
ISPD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek S. Nandakumar, Malgorzata Marek-Sadowska |
Layout effects in fine grain 3D integrated regular microprocessor blocks. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jen-Yi Wuu, Fedor G. Pikus, Andres J. Torres, Malgorzata Marek-Sadowska |
Rapid layout pattern classification. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Di-an Li, Malgorzata Marek-Sadowska |
Variation-aware electromigration analysis of power/ground networks. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek S. Nandakumar, Malgorzata Marek-Sadowska |
Low power, high throughput network-on-chip fabric for 3D multicore processors. |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Layout Generator for Transistor-Level High-Density Regular Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek S. Nandakumar, David Newmark, Yaping Zhan, Malgorzata Marek-Sadowska |
Statistical static timing analysis flow for transistor level macros in a microprocessor. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Performance study of VeSFET-based, high-density regular circuits. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
advanced technology., transistor layout, DFM, regular fabric |
| 1 | Di-an Li, Malgorzata Marek-Sadowska, Bill Lee |
On-chip em-sensitive interconnect structures. |
SLIP |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
Spare Cells With Constant Insertion for Engineering Change. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Timing-Aware Multiple-Delay-Fault Diagnosis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska, Francois Maire, Christophe Matheron |
A study of decoupling capacitor effectiveness in power and ground grid networks. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska |
Electromigration study of power-gated grids. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
electromigration, power network |
| 1 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly |
Transistor-level layout of high-density regular circuits. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
transistor layout, placement and routing, regular fabric, dfm |
| 1 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Improving the Resolution of Single-Delay-Fault Diagnosis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Timing-Aware Multiple-Delay-Fault Diagnosis. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
defect-diagnosis, diagnosis, ATPG, DFT, delay-testing |
| 1 | Hailin Jiang, Malgorzata Marek-Sadowska |
Power gating scheduling for power/ground noise reduction. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
scheduling, power gating, power supply noise |
| 1 | Aida Todri, Malgorzata Marek-Sadowska, Joseph N. Kozhaya |
Power supply noise aware workload assignment for multi-core systems. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly, Andrzej Pfitzner, Dominik Kasprowicz |
Is there always performance overhead for regular fabric? |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Nilesh A. Modi, Malgorzata Marek-Sadowska |
ECO-Map: Technology remapping for post-mask ECO using simulated annealing. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
Timing analysis considering IR drop waveforms in power gating designs. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska |
A study of reliability issues in clock distribution networks. |
ICCD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Timing-Aware Power-Noise Reduction in Placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hailin Jiang, Malgorzata Marek-Sadowska |
Power-Gating Aware Floorplanning. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
Electromigration and voltage drop aware power grid optimization for power gated ICs. |
ISLPED |
2007 |
DBLP DOI BibTeX RDF |
power supply grid, power gating, electromigration |
| 1 | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Wojciech Maly, Yi-Wei Lin, Malgorzata Marek-Sadowska |
OPC-Free and Minimally Irregular IC Design Style. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
Analysis and optimization of power-gated ICs with multiple power gating configurations. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
Engineering change using spare cells with constant insertion. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Analysis and methodology for multiple-fault diagnosis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
Semi-Individual Wire-Length Prediction With Application to Logic Synthesis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
Designing via-configurable logic blocks for regular fabric. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Zhiyuan Wang, Kun-Han Tsai, Janusz Rajski |
Delay Fault Diagnosis for Non-Robust Test. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Kuan Tsai, Malgorzata Marek-Sadowska |
Analysis of Process Variation's Effect on SRAM's Read Stability. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology. |
ITC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hailin Jiang, Malgorzata Marek-Sadowska |
Power/ground supply network optimization for power-gating. |
ICCD |
2006 |
DBLP BibTeX RDF |
|
| 1 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Delay-fault diagnosis using timing information. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
On-chip power-supply network optimization using multigrid-based technique. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
A study of netlist structure and placement efficiency. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Hu, Malgorzata Marek-Sadowska |
Multilevel fixed-point-addition-based VLSI placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yajun Ran, Alex Kondratyev, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska |
Eliminating false positives in crosstalk noise analysis. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai Wang, Yajun Ran, Hailin Jiang, Malgorzata Marek-Sadowska |
General skew constrained clock network sizing based on sequential linear programming. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Kuan Tsai, Malgorzata Marek-Sadowska |
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
A congestion-driven placement framework with local congestion prediction. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
cell padding, congestion prediction, placement migration |
| 1 | Hailin Jiang, Kai Wang, Malgorzata Marek-Sadowska |
Clock skew bounds estimation under power supply and process variations. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
process variation, clock skew, SLP |
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
Wire length prediction-based technology mapping and fanout optimization. |
ISPD |
2005 |
DBLP DOI BibTeX RDF |
prediction, congestion, wire length |
| 1 | Bo Hu, Yue Zeng, Malgorzata Marek-Sadowska |
mFAR: fixed-points-addition-based VLSI placement algorithm. |
ISPD |
2005 |
DBLP DOI BibTeX RDF |
placement, fixed points, force-directed |
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Skew-programmable clock design for FPGA and skew-aware placement. |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
clock architecture, skew optimization, placement |
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Timing-aware power noise reduction in layout. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
Via-configurable routing architectures and fast design mappability estimation for regular fabrics. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
Pre-layout Physical Connectivity Prediction with Application in Clustering-Based Placement. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hailin Jiang, Malgorzata Marek-Sadowska, Sani R. Nassif |
Benefits and Costs of Power-Gating Technique. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Macchiarulo, Shih-Min Shu, Malgorzata Marek-Sadowska |
Pipelining Sequential Circuits with Wave Steering. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Hu, Malgorzata Marek-Sadowska |
Fine granularity clustering-based placement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Wei Jim Chang, Ming-Fu Hsiao, Bo Hu, Kai Wang, Malgorzata Marek-Sadowska, Chung-Kuan Cheng, Sao-Jie Chen |
Fast postplacement optimization using functional symmetries. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Qinghua Liu, Bo Hu, Malgorzata Marek-Sadowska |
Individual wire-length prediction with application to timing-driven placement. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Sequential delay budgeting with interconnect prediction. |
IEEE Trans. VLSI Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Delay Fault Diagnosis Using Timing Information. |
ISQED |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
Clock network sizing via sequential linear programming with time-domain analysis. |
ISPD |
2004 |
DBLP DOI BibTeX RDF |
sequential linear programming, sizing, clock skew, time-domain analysis |
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
A study of netlist structure and placement efficiency. |
ISPD |
2004 |
DBLP DOI BibTeX RDF |
netlist structure, efficiency, placement |
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
On designing via-configurable cell blocks for regular fabrics. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
via configurable, layout, regular fabric |
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
Buffer sizing for clock power minimization subject to general skew constraints. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
sequential linear programming, sizing, clock skew scheduling |
| 1 | Qinghua Liu, Malgorzata Marek-Sadowska |
Pre-layout wire length and congestion estimation. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
prediction, congestion, wire length |
| 1 | Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Malgorzata Marek-Sadowska |
Eliminating False Positives in Crosstalk Noise Analysis. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
An integrated design flow for a via-configurable gate array. |
ICCAD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Hu, Malgorzata Marek-Sadowska |
Multilevel expansion-based VLSI placement with blockages. |
ICCAD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
The Magic of a Via-Configurable Regular Fabric. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
Potential Slack Budgeting with Clock Skew Optimization. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Diagnosis of Hold Time Defects. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Wei Jim Chang, Ming-Fu Hsiao, Malgorzata Marek-Sadowska |
A new reasoning scheme for efficient redundancy addition and removal. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Arindam Mukherjee, Malgorzata Marek-Sadowska |
Wave steering to integrate logic and physical syntheses. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer |
Buffer delay change in the presence of power and ground noise. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Singh, Arindam Mukherjee, Luca Macchiarulo, Malgorzata Marek-Sadowska |
PITIA: an FPGA for throughput-intensive applications. |
IEEE Trans. VLSI Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Arindam Mukherjee, Malgorzata Marek-Sadowska |
Clock and Power Gating with Timing Closure. |
IEEE Design & Test of Computers |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chung-Kuan Tsai, Malgorzata Marek-Sadowska |
Modeling Crosstalk Induced Delay. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
Minimizing Inter-Clock Coupling Jitter. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiyuan Wang, Kun-Han Tsai, Malgorzata Marek-Sadowska, Janusz Rajski |
An Efficient and Effective Methodology on the Multiple Fault Diagnosis. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Hu, Hailin Jiang, Qinghua Liu, Malgorzata Marek-Sadowska |
Synthesis and placement flow for gain-based programmable regular fabrics. |
ISPD |
2003 |
DBLP DOI BibTeX RDF |
programmable, regular fabric, gain |
| 1 | Bo Hu, Malgorzata Marek-Sadowska |
Fine granularity clustering for large scale placement problems. |
ISPD |
2003 |
DBLP DOI BibTeX RDF |
clustering, placement |
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Sequential delay budgeting with interconnect prediction. |
SLIP |
2003 |
DBLP DOI BibTeX RDF |
delay budgeting, sequential circuits, interconnect prediction |
| 1 | Qinghua Liu, Bo Hu, Malgorzata Marek-Sadowska |
Wire length prediction in constraint driven placement. |
SLIP |
2003 |
DBLP DOI BibTeX RDF |
wire length prediction, clustering |
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Delay budgeting in sequential circuit with application on FPGA placement. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
delay budgeting, FPGA, placement, sequential circuits |
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
On-chip power supply network optimization using multigrid-based technique. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
congestion-aware, multigrid, power supply noise |
| 1 | Yajun Ran, Malgorzata Marek-Sadowska |
Crosstalk noise in FPGAs. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
FPGAs, noise, crosstalk, switch box |
| 1 | Bo Hu, Malgorzata Marek-Sadowska |
Wire length prediction based clustering and its application in placement. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
wire length prediction, clustering, placement |
| 1 | Bo Hu, Yosinori Watanabe, Alex Kondratyev, Malgorzata Marek-Sadowska |
Gain-based technology mapping for discrete-size cell libraries. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
technology mapping, logic effort, gain |
| 1 | Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska |
Temporofunctional crosstalk noise analysis. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
SAT formula, timed Boolean logic, crosstalk noise |
| 1 | Kai Wang, Malgorzata Marek-Sadowska |
Power/Ground Mesh Area Optimization Using Multigrid-Based Technique. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
A crosstalk aware two-pin net router. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
Minimizing coupling jitter by buffer resizing for coupled clock networks. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
Minimum-Area Sequential Budgeting for FPGA. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Multiple Fault Diagnosis Using n-Detection Tests. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
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