Search results for "Manisha Pattanaik"

Found 9 publication records. Showing 9 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link
1	Shilpi Birla, Neeraj Kumar Shukla, Kapil Rathi, Rakesh Kumar Singh, Manisha Pattanaik	Analysis of 8T SRAM Cell at Various Process Corners at 65 nm Process Technology.	Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Shilpi Birla, Rakesh Kumar Singh, Manisha Pattanaik	Stability and Leakage Analysis of a Novel PP Based 9T SRAM Cell Using N Curve at Deep Submicron Technology for Multimedia Applications.	Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Subhra Dhar, Manisha Pattanaik, Poolla Rajaram	Advancement in Nanoscale CMOS Device Design En Route to Ultra-Low-Power Applications.	VLSI Design	2011	DBLP DOI BibTeX RDF
1	Shashank Parashar, Chaudhry Indra Kumar, Manisha Pattanaik	An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Nafis uddin Khan, K. V. Arya, Manisha Pattanaik	An efficient image noise removal and enhancement method.	SMC	2010	DBLP DOI BibTeX RDF
1	Nishant Khanwalkar, Shashikala Tapaswi, Manisha Pattanaik	An Efficient Compressed Domain Spatial Transcoding Scheme for Adaptive Video Content Delivery.	PCM	2010	DBLP DOI BibTeX RDF
1	Deepak Kumar, Pankaj Kumar, Manisha Pattanaik	Performance analysis of dynamic threshold MOS (DTMOS) based 4-input multiplexer switch for low power and high speed FPGA design.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Deepak Kumar, Pankaj Kumar, Manisha Pattanaik	Performance Analysis of 90nm Look Up Table (LUT) for Low Power Application.	DSD	2010	DBLP DOI BibTeX RDF
1	Manisha Pattanaik, Swapna Banerjee	A New Approach to Analyze a Sub-micron CMOS Inverter.	VLSI Design	2003	DBLP DOI BibTeX RDF

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Publications of "Manisha Pattanaik" ( http://dblp.L3S.de/Authors/Manisha_Pattanaik )