Search results for "Margaret Martonosi"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Emmanouil Koukoumidis, Margaret Martonosi, Li-Shiuan Peh	Leveraging Smartphone Cameras for Collaborative Road Advisories.	IEEE Trans. Mob. Comput.	2012	DBLP DOI BibTeX RDF
1	Margaret Martonosi	Keynote: Parallelism, heterogeneity, communication: Emerging challenges for performance analysis.	ISPASS	2012	DBLP DOI BibTeX RDF
1	Wenhao Jia, Kelly A. Shaw, Margaret Martonosi	Stargazer: Automated regression-based GPU design space exploration.	ISPASS	2012	DBLP DOI BibTeX RDF
1	Yavuz Yetim, Sharad Malik, Margaret Martonosi	EPROF: An energy/performance/reliability optimization framework for streaming applications.	ASP-DAC	2012	DBLP DOI BibTeX RDF
1	Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi	Parallelization libraries: Characterizing and reducing overheads.	TACO	2011	DBLP DOI BibTeX RDF
1	Carole-Jean Wu, Margaret Martonosi	Adaptive timekeeping replacement: Fine-grained capacity management for shared CMP caches.	TACO	2011	DBLP DOI BibTeX RDF
1	Carole-Jean Wu, Margaret Martonosi	Characterization and dynamic mitigation of intra-application cache interference.	ISPASS	2011	DBLP DOI BibTeX RDF
1	Carole-Jean Wu, Aamer Jaleel, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer	PACMan: prefetch-aware cache management for high performance caching.	MICRO	2011	DBLP DOI BibTeX RDF
1	Carole-Jean Wu, Aamer Jaleel, William Hasenplaugh, Margaret Martonosi, Simon C. Steely Jr., Joel S. Emer	SHiP: signature-based hit predictor for high performance caching.	MICRO	2011	DBLP DOI BibTeX RDF
1	Sibren Isaacman, Richard A. Becker, Ramón Cáceres, Stephen G. Kobourov, Margaret Martonosi, James Rowland, Alexander Varshavsky	Identifying Important Places in People's Lives from Cellular Network Data.	Pervasive	2011	DBLP DOI BibTeX RDF
1	Sibren Isaacman, Margaret Martonosi	Low-infrastructure methods to improve internet access for mobile users in emerging regions.	WWW (Companion Volume)	2011	DBLP DOI BibTeX RDF
1	Sibren Isaacman, Richard A. Becker, Ramón Cáceres, Stephen G. Kobourov, Margaret Martonosi, James Rowland, Alexander Varshavsky	Ranges of human mobility in Los Angeles and New York.	PerCom Workshops	2011	DBLP DOI BibTeX RDF
1	Emmanouil Koukoumidis, Li-Shiuan Peh, Margaret Martonosi	RegReS: Adaptively maintaining a target density of regional services in opportunistic vehicular networks.	PerCom	2011	DBLP DOI BibTeX RDF
1	Sibren Isaacman, Stratis Ioannidis, Augustin Chaintreau, Margaret Martonosi	Distributed rating prediction in user generated content streams.	RecSys	2011	DBLP DOI BibTeX RDF
1	Emmanouil Koukoumidis, Li-Shiuan Peh, Margaret Martonosi	SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory.	MobiSys	2011	DBLP DOI BibTeX RDF
1	Emmanouil Koukoumidis, Li-Shiuan Peh, Margaret Martonosi	Demo: SignalGuru: leveraging mobile phones for collaborative traffic signal schedule advisory.	MobiSys	2011	DBLP DOI BibTeX RDF
1	Abhishek Bhattacharjee, Daniel Lustig, Margaret Martonosi	Shared last-level TLBs for chip multiprocessors.	HPCA	2011	DBLP DOI BibTeX RDF
1	Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam (eds.)	High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings	HiPEAC	2011	DBLP BibTeX RDF
1	Pei Zhang, Margaret Martonosi	CA-TSL: Energy Adaptation for Targeted System Lifetime in Sparse Mobile Ad Hoc Networks.	IEEE Trans. Mob. Comput.	2010	DBLP DOI BibTeX RDF
1	Pradip Hari, John B. P. McCabe, Jonathan Banafato, Marcus Henry, Kevin Ko, Emmanouil Koukoumidis, Ulrich Kremer, Margaret Martonosi, Li-Shiuan Peh	Adaptive spatiotemporal node selection in dynamic networks.	PACT	2010	DBLP DOI BibTeX RDF
1	Abhishek Bhattacharjee, Margaret Martonosi	Inter-core cooperative TLB for chip multiprocessors.	ASPLOS	2010	DBLP DOI BibTeX RDF	parallelism, prefetching, translation lookaside buffer
1	Kien Le, Ricardo Bianchini, Thu D. Nguyen, Ozlem Bilgir, Margaret Martonosi	Capping the brown energy consumption of Internet services at low cost.	Green Computing Conference	2010	DBLP DOI BibTeX RDF
1	Kien Le, Ozlem Bilgir, Ricardo Bianchini, Margaret Martonosi, Thu D. Nguyen	Managing the cost, energy consumption, and carbon footprint of internet services.	SIGMETRICS	2010	DBLP DOI BibTeX RDF	energy cap, request distribution, optimization, data center, renewable energy
1	Vincent Lenders, Margaret Martonosi	Repeatable and Realistic Experimentation in Mobile Wireless Networks.	IEEE Trans. Mob. Comput.	2009	DBLP DOI BibTeX RDF
1	Abhishek Bhattacharjee, Margaret Martonosi	Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors.	ISCA	2009	DBLP DOI BibTeX RDF	intel tbb, thread criticality prediction, parallel processing, caches, dvfs
1	Abhishek Bhattacharjee, Margaret Martonosi	Characterizing the TLB Behavior of Emerging Parallel Workloads on Chip Multiprocessors.	PACT	2009	DBLP DOI BibTeX RDF
1	David H. Albonesi, Margaret Martonosi, David I. August, José F. Martínez (eds.)	42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA	MICRO	2009	DBLP BibTeX RDF
1	André Seznec, Joel S. Emer, Michael F. P. O'Boyle, Margaret Martonosi, Theo Ungerer (eds.)	High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings	HiPEAC	2009	DBLP DOI BibTeX RDF
1	Stefanos Kaxiras, Margaret Martonosi	Computer Architecture Techniques for Power-Efficiency		2008	DOI RDF
1	Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi	Full-system chip multiprocessor power evaluations using FPGA-based emulation.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Sibren Isaacman, Margaret Martonosi	Potential for collaborative caching and prefetching in largely-disconnected villages.	Wireless Networks and Systems for Developing Regions	2008	DBLP DOI BibTeX RDF	caching, prefetching, delay tolerant networking
1	Tarek F. Abdelzaher, Margaret Martonosi, Adam Wolisz (eds.)	Proceedings of the 6th International Conference on Embedded Networked Sensor Systems, SenSys 2008, Raleigh, NC, USA, November 5-7, 2008	SenSys	2008	DBLP BibTeX RDF
1	Margaret Martonosi	ZebraNet and beyond: applications and systems support for mobile, dynamic networks.	CASES	2008	DBLP DOI BibTeX RDF
1	Pei Zhang, Margaret Martonosi	LOCALE: Collaborative Localization Estimation for Sparse Mobile Sensor Networks.	IPSN	2008	DBLP DOI BibTeX RDF	Disconnected Networks, Collaboration, Mobile, Localization, Sparse Networks, Delay-Tolerant
1	Gilberto Contreras, Margaret Martonosi	Characterizing and improving the performance of Intel Threading Building Blocks.	IISWC	2008	DBLP DOI BibTeX RDF
1	Vincent Lenders, Emmanouil Koukoumidis, Pei Zhang, Margaret Martonosi	Location-based trust for mobile user-generated content: applications, challenges and implementations.	HotMobile	2008	DBLP DOI BibTeX RDF
1	Gilberto Contreras, Margaret Martonosi, Jinzhang Peng, Guei-Yuan Lueh, Roy Ju	The XTREM power and performance simulator for the Intel XScale core: Design and experiences.	ACM Trans. Embedded Comput. Syst.	2007	DBLP DOI BibTeX RDF	Intel XScale technology, Java, Power modeling, power measurements
1	Yong Wang, Margaret Martonosi, Li-Shiuan Peh	Predicting link quality using supervised learning in wireless sensor networks.	Mobile Computing and Communications Review	2007	DBLP DOI BibTeX RDF
1	Eric Chi, Stephen A. Lyon, Margaret Martonosi	Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits.	ISCA	2007	DBLP DOI BibTeX RDF	architecture, quantum
1	Christopher M. Sadler, Margaret Martonosi	Dali: a communication-centric data abstraction layer for energy-constrained devices in mobile sensor networks.	MobiSys	2007	DBLP DOI BibTeX RDF	data search and storage, energy efficient communications, mobile ad hoc sensor networks
1	James Donald, Margaret Martonosi	An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation.	Computer Architecture Letters	2006	DBLP DOI BibTeX RDF
1	Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks	Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance.	IEEE Micro	2006	DBLP DOI BibTeX RDF	microprocessor, energy savings, Dynamic-compilation
1	James Donald, Margaret Martonosi	Techniques for Multicore Thermal Management: Classification and New Exploration.	ISCA	2006	DBLP DOI BibTeX RDF
1	James Donald, Margaret Martonosi	Power efficiency for variation-tolerant multicore processors.	ISLPED	2006	DBLP DOI BibTeX RDF	power, multicore, parallel applications, variation
1	John Paul Shen, Margaret Martonosi (eds.)	Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006	ASPLOS	2006	DBLP BibTeX RDF
1	Canturk Isci, Gilberto Contreras, Margaret Martonosi	Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management.	MICRO	2006	DBLP DOI BibTeX RDF
1	Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi	An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.	MICRO	2006	DBLP DOI BibTeX RDF
1	Yong Wang, Margaret Martonosi, Li-Shiuan Peh	Situation-Aware Caching Strategies in Highly Varying Mobile Networks.	MASCOTS	2006	DBLP DOI BibTeX RDF
1	Pei Zhang, Margaret Martonosi	Energy adaptation techniques to optimize data delivery in store-and-forward sensor networks.	SenSys	2006	DBLP DOI BibTeX RDF	scheduling, adaptive, energy, system lifetime
1	Christopher M. Sadler, Margaret Martonosi	Data compression algorithms for energy-constrained devices in delay tolerant networks.	SenSys	2006	DBLP DOI BibTeX RDF	energy efficient communications, wireless sensor networks, mobile ad hoc networks, data compression
1	Pei Zhang, Christopher M. Sadler, Margaret Martonosi	Middleware for long-term deployment of delay-tolerant sensor networks.	MidSens	2006	DBLP DOI BibTeX RDF	sensor networks, delay-tolerant networks, application scheduling, middleware system
1	Gilberto Contreras, Margaret Martonosi	Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior.	IISWC	2006	DBLP DOI BibTeX RDF
1	Canturk Isci, Margaret Martonosi	Phase characterization for power: evaluating control-flow-based and event-counter-based techniques.	HPCA	2006	DBLP DOI BibTeX RDF
1	Margaret Martonosi	Embedded systems in the wild: ZebraNet software, hardware, and deployment experiences.	LCTES	2006	DBLP DOI BibTeX RDF
1	Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi	Hardware-modulated parallelism in chip multiprocessors.	SIGARCH Computer Architecture News	2005	DBLP DOI BibTeX RDF
1	Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark	Formal Control Techniques for Power-Performance Management.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Power performance management, dynamic voltage, frequency sealing, chip multiprocessors, multiple-clock-domain
1	Canturk Isci, Alper Buyuktosunoglu, Margaret Martonosi	Long-Term Workload Phases: Duration Predictions and Applications to DVFS.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Adaptive dynamic management, workload behavior, duration predictions, prediction techniques, DVFS, performance counters
1	Fen Xie, Margaret Martonosi, Sharad Malik	Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation.	ISLPED	2005	DBLP DOI BibTeX RDF	bounds on energy savings, low power, dynamic voltage scaling, linear time
1	Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark	Coordinated, distributed, formal energy management of chip multiprocessors.	ISLPED	2005	DBLP DOI BibTeX RDF	power, dynamic voltage scaling
1	Gilberto Contreras, Margaret Martonosi	Power prediction for intel XScale processors using performance monitoring unit events.	ISLPED	2005	DBLP DOI BibTeX RDF	XScale, power estimation, power modeling, hardware performance counters
1	Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks	A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance.	MICRO	2005	DBLP DOI BibTeX RDF
1	Yong Wang, Margaret Martonosi, Li-Shiuan Peh	A new scheme on link quality prediction and its applications to metric-based routing.	SenSys	2005	DBLP DOI BibTeX RDF	sensor networks, classification, supervised learning, link quality
1	Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark	Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors.	HPCA	2005	DBLP DOI BibTeX RDF
1	Fen Xie, Margaret Martonosi, Sharad Malik	Efficient behavior-driven runtime dynamic voltage scaling policies.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	runtime dynamic voltage scaling, low power
1	Fen Xie, Margaret Martonosi, Sharad Malik	Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling.	TACO	2004	DBLP DOI BibTeX RDF	low power, compiler, Analytical model, dynamic voltage scaling, mixed-integer linear programming
1	Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras	Implementing branch-predictor decay using quasi-static memory cells.	TACO	2004	DBLP DOI BibTeX RDF	Energy aware computing
1	Yong Wang, Margaret Martonosi, Li-Shiuan Peh	MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks.	Mobile Computing and Communications Review	2004	DBLP DOI BibTeX RDF
1	David Brooks, Pradip Bose, Margaret Martonosi	Power-performance simulation: design and validation strategies.	SIGMETRICS Performance Evaluation Review	2004	DBLP DOI BibTeX RDF
1	Russ Joseph, Margaret Martonosi, Zhigang Hu	Spectral analysis for characterizing program power and performance.	ISPASS	2004	DBLP DOI BibTeX RDF
1	Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark	Formal online methods for voltage/frequency control in multiple clock domain microprocessors.	ASPLOS	2004	DBLP DOI BibTeX RDF	MCD processors, formal methods, dynamic voltage/frequency scaling
1	Pei Zhang, Christopher M. Sadler, Stephen A. Lyon, Margaret Martonosi	Hardware design experiences in ZebraNet.	SenSys	2004	DBLP DOI BibTeX RDF	ZebraNet, sensor networks, GPS, sensor deployment
1	Ting Liu, Christopher M. Sadler, Pei Zhang, Margaret Martonosi	Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet.	MobiSys	2004	DBLP BibTeX RDF
1	Russ Joseph, Zhigang Hu, Margaret Martonosi	Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization.	HPCA	2004	DBLP DOI BibTeX RDF
1	Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh	XTREM: a power simulator for the Intel XScale® core.	LCTES	2004	DBLP DOI BibTeX RDF	XORP, XScale, Java, power modeling, hardware performance counters, power measurements
1	Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai	Challenges in Computer Architecture Evaluation.	IEEE Computer	2003	DBLP DOI BibTeX RDF
1	Fen Xie, Margaret Martonosi, Sharad Malik	Compile-time dynamic voltage scaling settings: opportunities and limits.	PLDI	2003	DBLP DOI BibTeX RDF	low power, compiler, analytical model, dynamic voltage scaling, mixed-integer linear programming
1	Canturk Isci, Margaret Martonosi	Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data.	MICRO	2003	DBLP DOI BibTeX RDF	Intel Pentium
1	Russ Joseph, David Brooks, Margaret Martonosi	Control Techniques to Eliminate Voltage Emergencies in High Performance Processors.	HPCA	2003	DBLP DOI BibTeX RDF
1	Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras	TCP: Tag Correlating Prefetchers.	HPCA	2003	DBLP DOI BibTeX RDF
1	Ting Liu, Margaret Martonosi	Impala: a middleware system for managing autonomic, parallel sensor systems.	PPOPP	2003	DBLP DOI BibTeX RDF	sensor networks, software adaptation, software update, middleware system
1	Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark	Implementing Decay Techniques using 4T Quasi-Static Memory Cells.	Computer Architecture Letters	2002	DBLP DOI BibTeX RDF
1	Zhigang Hu, Stefanos Kaxiras, Margaret Martonosi	Let caches decay: reducing leakage energy via exploitation of cache generational behavior.	ACM Trans. Comput. Syst.	2002	DBLP DOI BibTeX RDF	generational behavior, Cache memories, leakage power, cache decay
1	Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras	Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. (PDF / PS)	ISCA	2002	DBLP DOI BibTeX RDF	memory hierachy, time-based techniques, timekeeping prefetching, conflict miss identification, dead block prediction, victim cache filtering
1	Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark	Managing leakage for transient data: decay and quasi-static 4T memory cells.	ISLPED	2002	DBLP DOI BibTeX RDF	4T, decay, memory cell, quasi-static, transient data, leakage power
1	Philo Juang, Hidekazu Oki, Yong Wang, Margaret Martonosi, Li-Shiuan Peh, Daniel Rubenstein	Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet.	ASPLOS	2002	DBLP DOI BibTeX RDF
1	Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi	Applying Decay Strategies to Branch Predictors for Leakage Energy Savings.	ICCD	2002	DBLP DOI BibTeX RDF
1	Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi	Cache decay: exploiting generational behavior to reduce cache leakage power.	ISCA	2001	DBLP DOI BibTeX RDF
1	Russ Joseph, Margaret Martonosi	Run-time power estimation in high performance microprocessors.	ISLPED	2001	DBLP DOI BibTeX RDF
1	David Brooks, Margaret Martonosi	Dynamic Thermal Management for High-Performance Microprocessors.	HPCA	2001	DBLP DOI BibTeX RDF
1	Hongli Zhang, Margaret Martonosi	A Mathematical Cache Miss Analysis for Pointer Data Structures.	PPSC	2001	DBLP BibTeX RDF
1	Kevin Skadron, Margaret Martonosi, Douglas W. Clark	Speculative Updates of Local and Global Branch History: A Quantitative Analysis.	J. Instruction-Level Parallelism	2000	DBLP BibTeX RDF
1	Zhen Luo, Margaret Martonosi	Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	Delayed addition, multiply-accumulate, FPGA, MAC, accumulation
1	David Brooks, Margaret Martonosi	Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance.	ACM Trans. Comput. Syst.	2000	DBLP DOI BibTeX RDF
1	Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal	Shared-memory multiprocessing: Current state and future directions.	Advances in Computers	2000	DBLP DOI BibTeX RDF
1	Darko Stefanovic, Margaret Martonosi	On Availability of Bit-Narrow Operations in General-Purpose Applications.	FPL	2000	DBLP DOI BibTeX RDF
1	Darko Stefanovic, Margaret Martonosi	Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note).	Euro-Par	2000	DBLP DOI BibTeX RDF
1	David Brooks, Vivek Tiwari, Margaret Martonosi	Wattch: a framework for architectural-level power analysis and optimizations.	ISCA	2000	DBLP DOI BibTeX RDF
1	Kevin Skadron, Margaret Martonosi, Douglas W. Clark	A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions.	IEEE PACT	2000	DBLP DOI BibTeX RDF
1	Xianfeng Zhou, Margaret Martonosi	Augmenting Modern Superscalar Architectures with Configurable Extended Instructions.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF
1	David Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose	Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor.	PACS	2000	DBLP DOI BibTeX RDF

Publications of "Margaret Martonosi" ( http://dblp.L3S.de/Authors/Margaret_Martonosi )