| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jeffry T. Russell, Margarida F. Jacome |
Program slicing across the hardware-software boundary for embedded systems.  |
IJES  |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Umar Farooq, Lizy Kurian John, Margarida F. Jacome |
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures. |
HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
Tiled dataflow architectures, predication, power-performance trade-offs |
| 1 | Chen He, Margarida F. Jacome |
Defect-Aware High-Level Synthesis Targeted at Reconfigurable Nanofabrics. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Fadi A. Zaraket, John Pape, Adnan Aziz, Margarida F. Jacome, Sarfraz Khurshid |
Global Optimization of Compositional Systems. |
FMCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Elias Mizan, Tileli Amimeur, Margarida F. Jacome |
Self-Imposed Temporal Redundancy: An Efficient Technique to Enhance the Reliability of Pipelined Functional Units. |
SBAC-PAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayis Ziotopoulos, Margarida F. Jacome, Gustavo de Veciana |
An RFID-Based Platform Supporting Context-Aware Computing in Complex Spaces. |
MDM |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen He, Margarida F. Jacome |
RAS-NANO: a reliability-aware synthesis framework for reconfigurable nanofabrics. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Satish Pillai, Margarida F. Jacome |
Predicated switching - optimizing speculation on EPIC machines. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramachandran, Margarida F. Jacome |
Xtream-fit: an energy-delay efficient data memory subsystem for embedded media processing. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen He, Margarida F. Jacome, Gustavo de Veciana |
A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies. |
IEEE Design & Test of Computers |
2005 |
DBLP DOI BibTeX RDF |
probabilistic design, reconfiguration, Nanotechnologies, defect tolerance |
| 1 | Margarida F. Jacome, Anand Ramachandran |
Power Aware Embedded Computing. |
The Industrial Information Technology Handbook |
2005 |
DBLP BibTeX RDF |
|
| 1 | Andrey V. Zykov, Elias Mizan, Margarida F. Jacome, Gustavo de Veciana, Ajay Subramanian |
High performance computing on fault-prone nanotechnologies: novel microarchitecture techniques exploiting reliability-delay trade-offs. |
DAC |
2005 |
DBLP DOI BibTeX RDF |
manotechnologies, reliability-delay trade-offs, performance optimization, fault tolerant microarchitectures |
| 1 | Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky |
Defect tolerant probabilistic design paradigm for nanotechnologies. |
DAC |
2004 |
DBLP DOI BibTeX RDF |
probabilistic design, nanotechnologies, defect tolerance |
| 1 | Margarida F. Jacome, Francky Catthoor |
Special issue on power-aware embedded computing. |
ACM Trans. Embedded Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Ramachandran, Margarida F. Jacome |
Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
streaming memory, low power, configurability, design space exploration, media processing, scratch-pad, energy delay product |
| 1 | Jeffry T. Russell, Margarida F. Jacome |
Architecture-level performance evaluation of component-based embedded systems. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
performance evaluation, embedded system, scenario, design space exploration, component-based, architecture-level |
| 1 | Satish Pillai, Margarida F. Jacome |
Compiler-Directed ILP Extraction for Clustered VLIW/EPIC Machines: Predication, Speculation and Modulo Scheduling. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen He, Marcello Lajolo, Margarida F. Jacome |
A Case Study of a System Level Approach to Exploration of Queuing Management Schemes for Input Queue Packet Switches. |
PDP |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffry T. Russell, Margarida F. Jacome |
Embedded Architect: A Tool for Early Performance Evaluation of Embedded Software. (PDF / PS) |
ICSE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Cagdas Akturan, Margarida F. Jacome |
An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors. |
Design Autom. for Emb. Sys. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana |
Cluster assignment for high-performance embedded VLIW processors. |
ACM Trans. Design Autom. Electr. Syst. |
2002 |
DBLP DOI BibTeX RDF |
Operation binding, clustered VLIW datapaths, embedded systems, partitioning, embedded processors |
| 1 | Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana |
Application-specific clustered VLIW datapaths: early exploration on a parameterized design space. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Cagdas Akturan, Margarida F. Jacome |
RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffry T. Russell, Margarida F. Jacome |
Scenario-based software characterization as a contingency to traditional program profiling. |
CASES |
2002 |
DBLP DOI BibTeX RDF |
program profile, typical behavior, performance, embedded system, static analysis, constraint, profiling, scenario, control flow, predicate |
| 1 | Margarida F. Jacome, Helvio P. Peixoto |
A Survey of Digital Design Reuse. |
IEEE Design & Test of Computers |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Viktor S. Lapinskii, Margarida F. Jacome, Gustavo de Veciana |
High-Quality Operation Binding for Clustered VLIW Datapaths. |
DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Gustavo de Veciana, Satish Pillai |
Clustered VLIW Architectures with Predicated Switching. |
DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Cagdas Akturan, Margarida F. Jacome |
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors. |
ICCAD |
2001 |
DBLP BibTeX RDF |
|
| 1 | Cagdas Akturan, Margarida F. Jacome |
RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors. |
CODES |
2001 |
DBLP DOI BibTeX RDF |
embedded systems, software pipelining, retiming, optimizing compilers, VLIW processors |
| 1 | Gustavo de Veciana, Margarida F. Jacome, Jian-Huei Guo |
Assessing Probabilistic Timing Constraints on System Performance. |
Design Autom. for Emb. Sys. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Gustavo de Veciana |
Design Challenges for New Application-Specific Processors. |
IEEE Design & Test of Computers |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Helvio P. Peixoto, Margarida F. Jacome |
A new technique for estimating lower bounds on latency for high level synthesis. |
ACM Great Lakes Symposium on VLSI |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Hugo A. Andrade, Margarida F. Jacome |
The Common Hardware and Software Object Model: CHSOM. |
PDPTA |
2000 |
DBLP BibTeX RDF |
|
| 1 | Cagdas Akturan, Margarida F. Jacome |
FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors. |
ISSS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Helvio P. Peixoto, Margarida F. Jacome, Ander Royo |
A Tight Area Upper Bound for Slicing Floorplans. |
VLSI Design |
2000 |
DBLP DOI BibTeX RDF |
Early area estimation, slicing floorplan, system level design |
| 1 | Margarida F. Jacome, Gustavo de Veciana, Viktor S. Lapinskii |
Exploring Performance Tradeoffs for Clustered VLIW ASIPs. |
ICCAD |
2000 |
DBLP BibTeX RDF |
|
| 1 | Satish Pillai, Margarida F. Jacome |
Symbolic Binding for Clustered VLIW ASIPs. (PDF / PS) |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | R. Anand, Margarida F. Jacome, Gustavo de Veciana |
Heuristic tradeoffs between latency and energy consumption in register assignment. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Helvio P. Peixoto, Ander Royo, Juan Carlos López |
The Design Space Layer: Supporting Early Design Space Exploration for Core-Based Designs. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Gustavo de Veciana |
Lower bound on latency for VLIW ASIP datapaths. |
ICCAD |
1999 |
DBLP BibTeX RDF |
|
| 1 | Margarida F. Jacome, Gustavo de Veciana, Cagdas Akturan |
Resource constrained dataflow retiming heuristics for VLIW ASIPs. |
CODES |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Pedro Merino, Juan Carlos López, Margarida F. Jacome |
A Hardwar Operating System for Dynamic Reconfiguration of FPGAs. |
FPL |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Gustavo de Veciana, Margarida F. Jacome, J.-H. Guo |
Hierarchical Algorithms for Assessing Probabilistic Constraints on System Performance. |
DAC |
1998 |
DBLP DOI BibTeX RDF |
verification, timing, design methodology, microprocessor |
| 1 | Pedro Merino, Margarida F. Jacome, Juan Carlos López |
A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems. |
FCCM |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Viktor S. Lapinskii |
NREC: Risk Assessment and Planning of Complex Designs. |
IEEE Design & Test of Computers |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Helvio P. Peixoto, Margarida F. Jacome |
Algorithm and architecture-level design space exploration using hierarchical data flows. |
ASAP |
1997 |
DBLP DOI BibTeX RDF |
architecture-level design space exploration, algorithm-level design space exploration, hierarchical data flows, fidelity system-level metrics, systems analysis, power consumption |
| 1 | Margarida F. Jacome, Stephen W. Director |
A formal basis for design process planning and management. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Stephen W. Director |
A formal basis for design process planning and management. |
ICCAD |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Margarida F. Jacome, Stephen W. Director |
Design Process Management for CAD Frameworks. |
DAC |
1992 |
DBLP BibTeX RDF |
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")