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Publications of "Mark Nakamoto" ( http://dblp.L3S.de/Authors/Mark_Nakamoto )

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Publication years (Num. hits)
2010 (1) 2012 (1)
Publication types (Num. hits)
article(1) inproceedings(1)
Venues (Conferences, Journals, ...)
CICC(1) IEEE Trans. VLSI Syst.(1)
Authors
Mark Nakamoto(2) Riko Radojcic(2) Wei Zhao(2) Aditya P. Karmarkar(1) Chandra Nimmagadda(1) Durodami Lisk(1) Matt Nowak(1) Sam Gu(1) Vinay K. Dasarapu(1) Xiaopeng Xu(1) Xiaoxia Wu(1) Yuan Xie(1)
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Found 2 publication records. Showing 2 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
1Xiaoxia Wu, Wei Zhao, Mark Nakamoto, Chandra Nimmagadda, Durodami Lisk, Sam Gu, Riko Radojcic, Matt Nowak, Yuan Xie Electrical Characterization for Intertier Connections and Timing Analysis for 3-D ICs. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Mark Nakamoto, Riko Radojcic, Wei Zhao, Vinay K. Dasarapu, Aditya P. Karmarkar, Xiaopeng Xu Simulation methodology and flow integration for 3D IC stress management. Search on Bibsonomy CICC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
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