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Publications of "Mark R. Greenstreet" ( http://dblp.L3S.de/Authors/Mark_R._Greenstreet )

  Author page on DBLP  Author page in RDF  Community of Mark R. Greenstreet in ASPL-2

Publication years (Num. hits)
1988-1999 (15) 2001-2005 (16) 2006-2009 (17) 2010-2012 (5)
Publication types (Num. hits)
article(10) inproceedings(42) proceedings(1)
Venues (Conferences, Journals, ...)
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The graphs summarize 53 occurrences of 45 keywords

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Found 53 publication records. Showing 53 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Brad D. Bingham, Mark R. Greenstreet Modeling Energy-Time Trade-Offs in VLSI Computation. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Ian W. Jones, Mark R. Greenstreet Synchronizer Performance in Deep Sub-Micron Technology. Search on Bibsonomy ASYNC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Vijay Anand Korthikanti, Gul Agha, Mark R. Greenstreet On the Energy Complexity of Parallel Algorithms. Search on Bibsonomy ICPP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Robert J. Drost, Mark R. Greenstreet, Shahriar Mirabbasi, Frank O'Mahony Varactor-based signal restoration for near-speed-of-light surfing global interconnect. Search on Bibsonomy CICC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Chao Yan, Mark R. Greenstreet, Jochen Eisinger Formal Verification of an Arbiter Circuit. Search on Bibsonomy ASYNC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Tarik Ono-Tesfaye, Mark R. Greenstreet A modular synchronizing FIFO for NoCs. Search on Bibsonomy NOCS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet Estimating reliability and throughput of source-synchronous wave-pipelined interconnect. Search on Bibsonomy NOCS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet Verifying VLSI Circuits. Search on Bibsonomy ATVA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
1Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF on-chip serdes, fpga, reliable, network-on-chip, interconnect, programmable, wave pipelining, bit-serial, surfing
1Bradley R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton Practical Asynchronous Interconnect Network Design. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Chao Yan, Mark R. Greenstreet Verifying an Arbiter Circuit. Search on Bibsonomy FMCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet, Suwen Yang Verifying start-up conditions for a ring oscillator. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF formal verification, dynamical systems, oscillators
1Brad D. Bingham, Mark R. Greenstreet Computation with Energy-Time Trade-Offs: Models, Algorithms and Lower-Bounds. Search on Bibsonomy ISPA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Brad D. Bingham, Mark R. Greenstreet Energy Optimal Scheduling on Multiprocessors with Migration. Search on Bibsonomy ISPA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Chao Yan, Mark R. Greenstreet Faster projection based methods for circuit level verification. Search on Bibsonomy ASP-DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Paul Teehan, Mark R. Greenstreet, Guy G. Lemieux A Survey and Taxonomy of GALS Design Styles. Search on Bibsonomy IEEE Design & Test of Computers The full citation details ... 2007 DBLP  DOI  BibTeX  RDF globally asynchronous, locally synchronous (GALS), clock domains, pausible clocks, loosely synchronous, synchronization, asynchronous
1Chao Yan, Mark R. Greenstreet Circuit Level Verification of a High-Speed Toggle. Search on Bibsonomy FMCAD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Mark R. Greenstreet, Jihong Ren A Jitter Attenuating Timing Chain. Search on Bibsonomy ASYNC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Mark R. Greenstreet Simulating Improbable Events. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Mark R. Greenstreet Computing synchronizer failure probabilities. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Mark R. Greenstreet Analysing the Robustness of Surfing Circuits. Search on Bibsonomy Electr. Notes Theor. Comput. Sci. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet, Jihong Ren Surfing Interconnect. Search on Bibsonomy ASYNC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
1Suwen Yang, Brian D. Winters, Mark R. Greenstreet Energy Efficient Surfing. Search on Bibsonomy ASYNC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Jihong Ren, Mark R. Greenstreet A unified optimization framework for equalization filter synthesis. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF equalizing filters, optimal synthesis, linear programming, crosstalk
1Suwen Yang, Mark R. Greenstreet Noise margin analysis for dynamic logic circuits. Search on Bibsonomy ICCAD The full citation details ... 2005 DBLP  BibTeX  RDF
1Bradley R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton Asynchronous IC Interconnect Network Design and Implementation Using a Standard ASIC Flow. Search on Bibsonomy ICCD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
1Jihong Ren, Mark R. Greenstreet Crosstalk Cancellation for Realistic PCB Buses. Search on Bibsonomy PATMOS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Jihong Ren, Mark R. Greenstreet A Signal Integrity Test Bed for PCB Buses. Search on Bibsonomy ICCD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Brian D. Winters, Mark R. Greenstreet Surfing: a robust form of wave pipelining using self-timed circuit techniques. Search on Bibsonomy Microprocessors and Microsystems The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Jihong Ren, Mark R. Greenstreet Equalizing Filter Design for Crosstalk Cancellation. Search on Bibsonomy ISVLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Ajanta Chakraborty, Mark R. Greenstreet Efficient Self-Timed Interfaces for Crossing Clock Domains. Search on Bibsonomy ASYNC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
1Jihong Ren, Mark R. Greenstreet Synthesizing optimal filters for crosstalk-cancellation for high-speed buses. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF equalizing filters, optimal synthesis, crosstalk, buses
1Mark R. Greenstreet, Anthony Winstanley, Aurélien Garivier An Event Spacing Experiment. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Charlie Diagrams, self-timed rings, timing analysis, phase transitions, attractors, hysteresis
1Mark R. Greenstreet, Brian D. Winters A Negative-Overhead, Self-Timed Pipeline. Search on Bibsonomy ASYNC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
1Claire Tomlin, Mark R. Greenstreet (eds.) Hybrid Systems: Computation and Control, 5th International Workshop, HSCC 2002, Stanford, CA, USA, March 25-27, 2002, Proceedings Search on Bibsonomy HSCC The full citation details ... 2002 DBLP  BibTeX  RDF
1Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet A light-weight framework for hardware verification. Search on Bibsonomy STTT The full citation details ... 2001 DBLP  DOI  BibTeX  RDF Refinement, Theorem-proving, Timing verification, Switch-level models, SRT division
1Mark R. Greenstreet, Brian de Alwis How to Achieve Worst-Case Performance. Search on Bibsonomy ASYNC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Anthony Winstanley, Mark R. Greenstreet Temporal Properties of Self-Timed Rings. Search on Bibsonomy CHARME The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
1Christoph Kern, Mark R. Greenstreet Formal verification in hardware design: a survey. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF language containment, model checking, formal methods, formal verification, case studies, theorem proving, survey, hardware verification
1Christoph Kern, Tarik Ono-Tesfaye, Mark R. Greenstreet A Light-Weight Framework for Hardware Verification. Search on Bibsonomy TACAS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet Real-Time Merging. Search on Bibsonomy ASYNC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF bounded-time, receptive mixer, real-time, merging, arbitration, metastability
1Mark R. Greenstreet, Tarik Ono-Tesfaye A Fast, asP*, RGD Arbiter. (PDF / PS) Search on Bibsonomy ASYNC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet, Ian Mitchell Reachability Analysis Using Polygonal Projections. Search on Bibsonomy HSCC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
1Tarik Ono-Tesfaye, Christoph Kern, Mark R. Greenstreet Verifying a Self-Timed Divider. Search on Bibsonomy ASYNC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF model checking, refinement, asynchronous, hardware verification, timing verification, self-timed, speed-independence
1Mark R. Greenstreet, Ian Mitchell Integrating Projections. Search on Bibsonomy HSCC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
1Peggy B. K. Pang, Mark R. Greenstreet Self-Timed Meshes Are Faster Than Synchronous. Search on Bibsonomy ASYNC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF self-timed meshes, linear speed-up, per-processor performance, simulation, logic CAD
1Mark R. Greenstreet Verifying Safety Properties of Differential Equations. Search on Bibsonomy CAV The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
1Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger Automatic Verification of Asynchronous Circuits. Search on Bibsonomy IEEE Design & Test of Computers The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
1Mark R. Greenstreet Implementing a STARI chip. (PDF / PS) Search on Bibsonomy ICCD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF STARI chip, high-speed signaling technique, MOSIS 2/spl mu/ CMOS process, self-timed FIFO, robust compensation, clock skew, digital signal processing chips, CMOS digital integrated circuits, self-timed circuits, synchronous circuits, 2 micron, timing circuits
1Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger Automatic Verification of Refinement. Search on Bibsonomy ICCD The full citation details ... 1994 DBLP  BibTeX  RDF
1Mark R. Greenstreet Using Synchronized Transitions for Simulation and Timing Verification. Search on Bibsonomy Designing Correct Circuits The full citation details ... 1992 DBLP  BibTeX  RDF
1Mark R. Greenstreet, Kenneth Steiglitz Bubbles can make self-timed pipelines fast. Search on Bibsonomy VLSI Signal Processing The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
1Jørgen Staunstrup, Mark R. Greenstreet From High-Level Descriptions to VLSI Circuits. Search on Bibsonomy BIT The full citation details ... 1988 DBLP  BibTeX  RDF
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