| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Tan Yan, Martin D. F. Wong |
Correctly Model the Diagonal Capacity in Escape Routing.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Leslie Hwang, Kevin L. Lin, Martin D. F. Wong |
Thermal via structural design in three-dimensional integrated circuits. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Ma 0002, Zigang Xiao, Martin D. F. Wong |
Algorithmic study on the routing reliability problem. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Martin D. F. Wong |
On simulated annealing in EDA. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Zigang Xiao, Yuelin Du, Hongbo Zhang, Martin D. F. Wong |
A polynomial time exact algorithm for self-aligned double patterning layout decomposition. |
ISPD |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuelin Du, Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao |
Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Lijuan Luo, Martin D. F. Wong, Lance Leong |
Parallel implementation of R-trees on the GPU. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit O. Topalaglu |
Efficient pattern relocation for EUV blank defect mitigation. |
ASP-DAC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Mark Po-Hung Lin, Hongbo Zhang, Martin D. F. Wong, Yao-Wen Chang |
Thermal-Driven Analog Placement Considering Device Matching. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Lijuan Luo, Tan Yan, Qiang Ma 0002, Martin D. F. Wong, Toshiyuki Shibuya |
A New Strategy for Simultaneous Escape Based on Boundary Routing. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao |
Lithography-aware layout modification considering performance impact. |
ISQED |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Ma 0002, Evangeline F. Y. Young, Martin D. F. Wong |
An optimal algorithm for layer assignment of bus escape routing on PCBs. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit Onur Topaloglu |
Self-aligned double patterning decomposition for overlay minimization and hot spot detection. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Qiang Ma 0002, Scott Chilstedt, Martin D. F. Wong, Deming Chen |
Routing with graphene nanoribbons. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao |
Mask cost reduction with circuit performance consideration for self-aligned double patterning. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Ma 0002, Hui Kong, Martin D. F. Wong, Evangeline F. Y. Young |
A provably good approximation algorithm for Rectangle Escape Problem with application to PCB routing. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Tan Yan, Martin D. F. Wong, Sanjay J. Patel |
Accelerating aerial image simulation with GPU. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Quang Dinh, Deming Chen, Martin D. F. Wong |
A Routing Approach to Reduce Glitches in Low Power FPGAs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Ma 0002, Tan Yan, Martin D. F. Wong |
A negotiated congestion based router for simultaneous escape routing. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhong, Martin D. F. Wong |
Fast block-iterative domain decomposition algorithm for IR drop analysis in large power grid. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lijuan Luo, Tan Yan, Qiang Ma 0002, Martin D. F. Wong, Toshiyuki Shibuya |
B-escape: a simultaneous escape routing algorithm based on boundary routing. |
ISPD |
2010 |
DBLP DOI BibTeX RDF |
PCB routing, dense circuit boards, computer-aided design, escape routing |
| 1 | Martin D. F. Wong |
Advances in PCB routing. |
SLIP |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Lijuan Luo, Martin D. F. Wong, Wen-mei W. Hwu |
An effective GPU implementation of breadth-first search. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
BFS, CUDA, GPU computing |
| 1 | Hui Kong, Qiang Ma 0002, Tan Yan, Martin D. F. Wong |
An optimal algorithm for finding disjoint rectangles and its application to PCB routing. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
PCB routing, maximum independent subset, escape routing |
| 1 | Hui Kong, Tan Yan, Martin D. F. Wong |
Optimal simultaneous pin assignment and escape routing for dense PCBs. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Quang Dinh, Deming Chen, Martin D. F. Wong |
Dynamic power estimation for deep submicron circuits with process variation. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao |
On process-aware 1-D standard cell design. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Ma 0002, Martin D. F. Wong, Kai-Yuan Chao |
Configurable multi-product floorplanning. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Pei-Ci Wu, Qiang Ma 0002, Martin D. F. Wong |
On the escape routing of differential pairs. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Martin D. F. Wong |
Recent research development in PCB layout. |
ICCAD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Quang Dinh, Deming Chen, Martin D. F. Wong |
BDD-based circuit restructuring for reducing dynamic power. |
ICCD |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Martin D. F. Wong |
Theories and algorithms on single-detour routing for untangling twisted bus. |
ACM Trans. Design Autom. Electr. Syst. |
2009 |
DBLP DOI BibTeX RDF |
printed circuit board (PCB), single-detour routing, twisted bus, dynamic programming, Bus routing |
| 1 | Huaizhi Wu, Martin D. F. Wong |
Incremental Improvement of Voltage Assignment. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
Archer: A History-Based Global Routing Algorithm. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Martin D. F. Wong |
BSG-Route: A Length-Constrained Routing Scheme for General Planar Topology. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Quang Dinh, Deming Chen, Martin D. F. Wong |
A routing approach to reduce glitches in low power FPGAs. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
glitch reduction, path balancing, fpgas, routing, low power |
| 1 | Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao, Liang Deng |
Wire shaping is practical. |
ISPD |
2009 |
DBLP DOI BibTeX RDF |
manufacturing for design, wire tapering, interconnect, opc, power minimization |
| 1 | Mark Po-Hung Lin, Hongbo Zhang, Martin D. F. Wong, Yao-Wen Chang |
Thermal-driven analog placement considering device matching. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
analog placement, thermal matching |
| 1 | Jia-Wei Fang, Martin D. F. Wong, Yao-Wen Chang |
Flip-chip routing with unified area-I/O pad assignments for package-board co-design. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
physical design, global routing, detailed routing |
| 1 | Tan Yan, Martin D. F. Wong |
A correct network flow model for escape routing. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
PCB routing, diagonal capacity, missing pin, package routing, network flow, escape routing |
| 1 | Hui Kong, Tan Yan, Martin D. F. Wong |
Automatic bus planner for dense PCBs. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
PCB routing, bus planning, topological routing, layer assignment |
| 1 | Lijuan Luo, Martin D. F. Wong |
On using SAT to ordered escape problems. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Hui Kong, Martin D. F. Wong |
Optimal layer assignment for escape routing of buses. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger |
Optimal routing algorithms for rectilinear pin clusters in high-density multichip modules. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
multi-chip modules, network flow, Escape routing |
| 1 | Huaizhi Wu, Martin D. F. Wong, Wilsin Gosti |
Postplacement voltage assignment under performance constraints. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
voltage assignment, Low power, timing, Voronoi diagram |
| 1 | Lei Cheng, Deming Chen, Martin D. F. Wong |
A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
Input vector control, gate replacement, leakage reduction |
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger |
Simultaneous Escape-Routing Algorithms for Via Minimization of High-Speed Boards. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Deming Chen, Martin D. F. Wong |
DDBDD: Delay-Driven BDD Synthesis for FPGAs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong |
Is Your Layout-Density Verification Exact? - A Fast Exact Deep Submicrometer Density Calculation Algorithm. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Liang Deng, Ruchir Puri, Kai-Yuan Chao, Martin D. F. Wong |
Fast Dummy-Fill Density Analysis With Coupling Constraints. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Hannah Honghua Yang, Martin D. F. Wong |
Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach. |
Encyclopedia of Algorithms |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhong, Martin D. F. Wong |
Thermal-Aware IR Drop Analysis in Large Power Grid. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
IR drop analysis, power grid, thermal |
| 1 | Lijuan Luo, Martin D. F. Wong |
Ordered escape routing based on Boolean satisfiability. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Quang Dinh, Deming Chen, Martin D. F. Wong |
Efficient ASIP design for configurable processors with fine-grained resource sharing. |
FPGA |
2008 |
DBLP DOI BibTeX RDF |
multi-cycle IO, compilation, ASIP, resource sharing, configurable processor |
| 1 | Tan Yan, Martin D. F. Wong |
BSG-Route: a length-matching router for general topology. |
ICCAD |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Huaizhi Wu, Martin D. F. Wong, I-Min Liu, Yusu Wang |
Placement-Proximity-Based Voltage Island Grouping Under Performance Requirement. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. Wong |
OPC-Friendly Bus Driven Floorplanning. |
ISQED |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong |
Is your layout density verification exact?: a fast exact algorithm for density calculation. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
fix-dissection, DFM, density |
| 1 | Hua Xiang, Liang Deng, Ruchir Puri, Kai-Yuan Chao, Martin D. F. Wong |
Dummy fill density analysis with coupling constraints. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
CMP, coupling, dummy fills |
| 1 | Huaizhi Wu, Martin D. F. Wong |
Improving Voltage Assignment by Outlier Detection and Incremental Placement. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Deming Chen, Martin D. F. Wong |
GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Deming Chen, Martin D. F. Wong |
DDBDD: Delay-Driven BDD Synthesis for FPGAs. |
DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhong, Martin D. F. Wong |
Fast Placement Optimization of Power Supply Pads. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
0.398 to 0.196 V, power supply pads, power grid networks, voltage deviation, 72 mins, 0.134 to 0.024 V, simulated annealing, iterative method, VLSI circuits |
| 1 | Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua Xiang |
Coupling-aware Dummy Metal Insertion for Lithography. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
coupling-aware dummy metal insertion, integrated circuits manufacturing technology, resolution enhancement techniques, off-axis illumination, forbidden pitches, printability improvement, invisible dummy metal segments, lithography cost minimization, optimal algorithm, chemical mechanical polish |
| 1 | Yu Zhong, Martin D. F. Wong |
Efficient Second-Order Iterative Methods for IR Drop Analysis in Power Grid. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | David M. Pawlowski, Liang Deng, Martin D. F. Wong |
Fast and Accurate OPC for Standard-Cell Layouts. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Tan Yan, Martin D. F. Wong |
Untangling twisted nets for bus routing. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Kong, Tan Yan, Martin D. F. Wong, Muhammet Mustafa Ozdal |
Optimal bus sequencing for escape routing in dense PCBs. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig |
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
Archer: a history-driven global routing algorithm. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
Two-layer bus routing for high-speed printed circuit boards. |
ACM Trans. Design Autom. Electr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
min-max length constraints, High-speed, bus routing, PCB |
| 1 | Hung-Ming Chen, I-Min Liu, Martin D. F. Wong |
I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoping Tang, Ruiqi Tian, Martin D. F. Wong |
Minimizing wire length in floorplanning. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Martin D. F. Wong |
Floorplan Design for Multimillion Gate FPGAs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong |
An ECO routing algorithm for eliminating coupling-capacitance violations. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
Algorithmic study of single-layer bus routing for high-speed boards. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
Algorithms for simultaneous escape routing and Layer assignment of dense PCBs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong |
A Length-Matching Routing Algorithm for High-Performance Printed Circuit Boards. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Huaizhi Wu, Martin D. F. Wong, I-Min Liu |
Timing-constrained and voltage-island-aware voltage assignment. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
voltage assignment, low power, timing, voronoi diagram |
| 1 | Lei Cheng, Liang Deng, Deming Chen, Martin D. F. Wong |
A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
gate replacement, input vector control, leakage reduction |
| 1 | Sebastian Vogel, Martin D. F. Wong |
Closed form solution for optimal buffer sizing using the Weierstrass elliptic function. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Deng, Martin D. F. Wong |
An exact algorithm for the statistical shortest path problem. |
ASP-DAC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, Xiaoping Tang, Martin D. F. Wong |
An algorithm for integrated pin assignment and buffer planning. |
ACM Trans. Design Autom. Electr. Syst. |
2005 |
DBLP DOI BibTeX RDF |
min-cost maximum flow, Buffer insertion, pin assignment |
| 1 | Hung-Ming Chen, Li-Da Huang, I-Min Liu, Martin D. F. Wong |
Simultaneous power supply planning and noise avoidance in floorplan design. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Hua Xiang, I-Min Liu, Martin D. F. Wong |
Wire Planning with Bounded Over-the-Block Wires. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
over-the-block, wire planning, routing |
| 1 | Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong |
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
Layer migration, Max-cut, Capacitance coupling |
| 1 | Muzhou Shao, Youxin Gao, Li-Pen Yuan, Hung-Ming Chen, Martin D. F. Wong |
Current Calculation on VLSI Signal Interconnects. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Muzhou Shao, Youxin Gao, Li-Pen Yuan, Martin D. F. Wong |
IR Drop and Ground Bounce Awareness Timing Model. |
ISVLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Deng, Martin D. F. Wong |
Energy optimization in memory address bus structure for application-specific systems. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong |
Redundant-via enhanced maze routing for yield improvement. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Lei Cheng, Liang Deng, Martin D. F. Wong |
Floorplanning for 3-D VLSI design. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongseok Cheon, Martin D. F. Wong |
Crowdedness-balanced multilevel partitioning for uniform resource utilization. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong |
CMP aware shuttle mask floorplanning. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoping Tang, Ruiqi Tian, Martin D. F. Wong |
Optimal redistribution of white space for wire length minimization. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zhong, Martin D. F. Wong |
Fast algorithms for IR drop analysis in large power grid. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Huaizhi Wu, I-Min Liu, Martin D. F. Wong, Yusu Wang |
Post-placement voltage island generation under performance requirement. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger |
Optimal routing algorithms for pin clusters in high-density multichip modules. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger |
An escape routing framework for dense boards with high-speed design constraints. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Liang Deng, Martin D. F. Wong |
Buffer insertion under process variations for delay minimization. |
ICCAD |
2005 |
DBLP BibTeX RDF |
|
| 1 | Hua Xiang, Kai-Yuan Chao, D. F. Wong |
An ECO algorithm for eliminating crosstalk violations. |
ISPD |
2004 |
DBLP DOI BibTeX RDF |
routing, crosstalk, ECO |
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