Search results for "Masayoshi Yoshimura"

Found 8 publication records. Showing 8 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Masayoshi Yoshimura, Yusuke Akamine, Yusuke Matsunaga	A Soft Error Tolerance Estimation Method for Sequential Circuits.	DFT	2011	DBLP DOI BibTeX RDF
1	Shusuke Yoshimoto, T. Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, H. Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto	Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura, Hiroshi Ogawa, Toshinori Hosokawa, Koji Yamazaki	Evaluation of transition untestable faults using a multi-cycle capture test generation method.	DDECS	2010	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura	Implementation of Multiobjective Optimization Procedures at the Product Design Planning Stage.	System Modelling and Optimization	2005	DBLP DOI BibTeX RDF	Product design planning stage, Pareto optimum solutions, Comparison of alternative designs, Hierarchical optimization problem, Rapid evaluation, Deeper insight into design solutions, Multiobjective optimization
1	Atsushi Kitazawa, Masayoshi Yoshimura	SemanticObjects and Biomedical Informatics.	BIBE	2004	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura, Toshinori Hosokawa, Mitsuyasu Ohta	A Test Point Insertion Method to Reduce the Number of Test Patterns.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura	Collaborative optimization for product design and manufacturing.	CAD	2002	DBLP BibTeX RDF
1	Toshinori Hosokawa, Masayoshi Yoshimura, Mitsuyasu Ohta	Design for testability strategies using full/partial scan designs and test point insertions to reduce test application times.	ASP-DAC	2001	DBLP DOI BibTeX RDF

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Publications of "Masayoshi Yoshimura" ( http://dblp.L3S.de/Authors/Masayoshi_Yoshimura )