| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Salvatore Campagna, Massimo Violante |
An hybrid architecture to detect transient faults in microprocessors: An experimental validation.  |
DATE  |
2012 |
DBLP BibTeX RDF |
|
| 1 | Enrico Costenaro, Massimo Violante, Dan Alexandrescu |
A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. |
IOLTS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianpiero Cabodi, Marco Murciano, Massimo Violante |
Boosting software fault injection for dependability analysis of real-time embedded applications. |
ACM Trans. Embedded Comput. Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Niccolò Battezzati, Luca Sterpone, Massimo Violante, Filomena Decuzzi |
A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs. |
VLSI-SoC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccolò Battezzati, Luca Sterpone, Massimo Violante |
An integrated flow for the design of hardened circuits on SRAM-based FPGAs. |
European Test Symposium |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Salvatore Campagna, Massimo Violante |
A framework to support the design of COTS-based reliable space computers for on-board data handling. |
IOLTS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Niccolò Battezzati, Davide Serrone, Massimo Violante |
A new framework for the automatic insertion of mitigation structures in circuits netlists. |
IOLTS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Niccolò Battezzati, Filomena Decuzzi, Luca Sterpone, Massimo Violante |
Soft errors in Flash-based FPGAs: Analysis methodologies and first results. |
FPL |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianpaolo Macario, Marco Torchiano, Massimo Violante |
An in-vehicle infotainment software architecture based on google android. |
SIES |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis |
A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt |
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis |
An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Massimo Violante, M. L. Esposti |
A low-cost solution for developing reliable Linux-based space computers for on-board data handling. |
IOLTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet |
Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs. |
IOLTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante |
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Instruction hardening, SET, SEU, Infrastructure IP |
| 1 | Cristiana Bolchini, Antonio Miele, Fabio Rebaudengo, Fabio Salice, Donatella Sciuto, Luca Sterpone, Massimo Violante |
Software and Hardware Techniques for SEU Detection in IP Processors. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Hardware/software techniques, Single-event upset faults, Reliability, Fault injection |
| 1 | Francesco Abate, Massimo Violante |
Coping with Obsolescence of Processor Cores in Critical Applications. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante |
On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs. |
IOLTS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Sterpone, Matteo Sonza Reorda, Massimo Violante, Fernanda Lima Kastensmidt, Luigi Carro |
Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs. |
J. Electronic Testing |
2007 |
DBLP DOI BibTeX RDF |
reliability, fault tolerant systems, SEU, SRAM-based FPGA |
| 1 | Luca Sterpone, Massimo Violante |
A new decompression system for the configuration process of SRAM-based FPGAS. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
configuration mechanisms, compression algorithm, SRAM-based FPGA |
| 1 | Luca Sterpone, Massimo Violante |
A new hardware architecture for performing the gridding of DNA microarray images. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
image data-processing, FPGA, edge detection, DNA microarray |
| 1 | Luca Sterpone, Massimo Violante |
Static and Dynamic Analysis of SEU Effects in SRAM-Based FPGAs. |
European Test Symposium |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrea Manuzzato, Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Luca Sterpone, Massimo Violante |
Sensitivity Evaluation of TMR-Hardened Circuits to Multiple SEUs Induced by Alpha Particles in Commercial SRAM-Based FPGAs. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Salvatore Pontarelli, Luca Sterpone, Gian-Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante |
Optimization of Self Checking FIR filters by means of Fault Injection Analysis. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Salvatore Pontarelli, Luca Sterpone, Gian-Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante |
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. |
IOLTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Sterpone, Massimo Violante |
A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
transient fault injection, FPGA, reliability, place and route |
| 1 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante |
A New Hybrid Fault Detection Technique for Systems-on-a-Chip. |
IEEE Trans. Computers |
2006 |
DBLP DOI BibTeX RDF |
SoC dependability, transient fault detection, infrastructure IP |
| 1 | Luca Sterpone, Massimo Violante |
Hardening FPGA-based Systems Against SEUs: A New Design Methodology. |
JCP |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante |
Early, Accurate Dependability Analysis of CAN-Based Networked Systems. |
IEEE Design & Test of Computers |
2006 |
DBLP DOI BibTeX RDF |
fault tolerance, fault injection, real-time and embedded systems, network architecture and design |
| 1 | Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Marta Portela-García, Celia López-Ongil, Luis Entrena |
Fault Injection-based Reliability Evaluation of SoPCs. |
European Test Symposium |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante |
A new approach to compress the configuration information of programmable devices. |
DATE Designers' Forum |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Luca Sterpone, Massimo Violante, Cristiana Bolchini, Antonio Miele, Donatella Sciuto |
Combined software and hardware techniques for the design of reliable IP processors. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Carlos Arthur Lang Lisbôa, Luigi Carro, Matteo Sonza Reorda, Massimo Violante |
Online hardening of programs against SEUs and SETs. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Alberto Manzone, Marcella Guagliumi Massimo Osella, Massimo Violante, Matteo Sonza Reorda |
Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications. |
MTV |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Sterpone, Massimo Violante |
ReCoM: A New Reconfigurable Compute Fabric Architecture for Computation-Intensive Applications. |
DDECS |
2006 |
DBLP BibTeX RDF |
|
| 1 | Luca Sterpone, Massimo Violante |
Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero, Luca Sterpone, Massimo Violante |
New evolutionary techniques for test-program generation for complex microprocessor cores. |
GECCO |
2005 |
DBLP DOI BibTeX RDF |
evolutionary algorithms, automatic test program generation |
| 1 | Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante |
Automatic generation of test sets for SBST of microprocessor IP cores. |
SBCCI |
2005 |
DBLP DOI BibTeX RDF |
FPGA, hardware accelerator, automatic test generation, pipelined architectures, microprocessor test, test programs |
| 1 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante |
On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. |
DSN |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Sterpone, Massimo Violante |
A design flow for protecting FPGA-based systems against single event upsets. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Luca Sterpone, Massimo Violante |
Efficient Estimation of SEU Effects in SRAM-Based FPGAs. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
Efficient analysis of single event transients. |
Journal of Systems Architecture |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
A New Approach to the Analysis of Single Event Transients in VLSI Circuits. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
hardware emulation, fault injection, single event transient |
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
A New Approach to Software-Implemented Fault Tolerance. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
fault injection, single event upsets, software-implemented fault tolerance |
| 1 | Fulvio Corno, Julio Pérez Acle, Matteo Sonza Reorda, Massimo Violante |
A multi-level approach to the dependability analysis of networked systems based on the CAN protocol. |
SBCCI |
2004 |
DBLP DOI BibTeX RDF |
fault injection, automotive, CAN bus |
| 1 | Ernesto Sánchez, Giovanni Squillero, Massimo Violante |
Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems. |
EvoWorkshops |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | O. Goloubeva, Matteo Sonza Reorda, Massimo Violante |
Automatic Generation of Validation Stimuli for Application-Specific Processors. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Bellato, Paolo Bernardi, D. Bortolato, A. Candelori, M. Ceschia, Alessandro Paccagnella, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, P. Zambolin |
Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
On-Line Analysis and Perturbation of CAN Networks. |
DFT |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante |
Hybrid Soft Error Detection by Means of Infrastructure IP Cores. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante |
On the Evaluation of SEU Sensitiveness in SRAM-Based FPGAs. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
New techniques for efficiently assessing reliability of SOCs. |
Microelectronics Journal |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Accurate Analysis of Single Event Upsets in a Pipelined Microprocessor. |
J. Electronic Testing |
2003 |
DBLP DOI BibTeX RDF |
fault injection, single event upsets, dependability evaluation |
| 1 | Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante |
Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
Emulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Pérez, Matteo Sonza Reorda, Massimo Violante |
Accurate Dependability Analysis of CAN-Based Networked Systems. |
SBCCI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
An Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
A P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Pérez, Matteo Sonza Reorda, Massimo Violante |
Dependability Analysis of CAN Networks: An Emulation-Based Approach. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdelaziz Ammari, Régis Leveugle, Matteo Sonza Reorda, Massimo Violante |
Detailed Comparison of Dependability Analyses Performed at RT and Gate Levels. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | O. Goloubeva, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Soft-Error Detection Using Control Flow Assertions. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | O. Goloubeva, Matteo Sonza Reorda, Massimo Violante |
An RT-level Concurrent Error Detection Technique for Data Dominated Systems. (PDF / PS) |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
Accurate and Efficient Analysis of Single Event Transients in VLSI Circuits. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Massimo Violante, M. Ceschia, Matteo Sonza Reorda, Alessandro Paccagnella, Paolo Bernardi, Maurizio Rebaudengo, D. Bortolato, M. Bellato, P. Zambolin, A. Candelori |
Analyzing SEU Effects in SRAM-based FPGAs. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits. |
J. Electronic Testing |
2002 |
DBLP DOI BibTeX RDF |
FPGA-based fault emulation, fault injection, single event upset, dependability evaluation, fault tolerant circuits |
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Simulation-Based Analysis of SEU Effects on SRAM-based FPGAs. |
FPL |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Matteo Sonza Reorda, Massimo Violante |
Fault List Compaction through Static Timing Analysis for Efficient Fault Injection Experiments. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
A New Functional Fault Model for FPGA Application-Oriented Testing. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Massimo Violante |
A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Analysis of SEU Effects in a Pipelined Processor. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Marco Torchiano |
A Source-to-Source Compiler for Generating Dependable Software. |
SCAM |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits. |
FPL |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
FPGA-Based Fault Injection for Microprocessor Systems. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcello Lajolo, Matteo Sonza Reorda, Massimo Violante |
Early Evaluation Of Bus Interconnects Dependability For System-On-Chip Designs. |
VLSI Design |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Ph. Cheynet, B. Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
System safety through automatic high-level code transformations: an experimental evaluation. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante |
On the test of microprocessor IP cores. |
DATE |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Exploiting FPGA-Based Techniques for Fault Injection Campaigns on VLSI Circuits . (PDF / PS) |
DFT |
2001 |
DBLP DOI BibTeX RDF |
FPGA, dependability, Fault detection, Fault Injection |
| 1 | Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Exploiting FPGA for Accelerating Fault Injection Experiments. |
IOLTW |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reorda, Massimo Violante |
Early Power Estimation for System-on-Chip Designs. |
PATMOS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Prediction of Power Requirements for High-Speed Circuits. |
EvoWorkshops |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Speeding-Up Fault Injection Campaigns in VHDL Models. |
SAFECOMP |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante |
Low Power BIST via Non-Linear Hybrid Cellular Automata. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno |
Evaluating System Dependability in a Co-Design Framework. |
DATE |
2000 |
DBLP DOI BibTeX RDF |
Dependability, Fault Injection, Safety-Critical Systems, HW/SW Codesign |
| 1 | Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante |
A genetic algorithm-based system for generating test programs for microprocessor IP cores. |
ICTAI |
2000 |
DBLP DOI BibTeX RDF |
industrial property, genetic algorithm based system, test program generation, microprocessor IP cores, digital systems design trend, design-and-reuse paradigm, intellectual property cores, encrypted gate-level netlist, testability problems, automatic approach, processor cores, fault coverage figures, random approach, genetic algorithms, genetic algorithms, microprocessor chips, automatic test software, test program, electronic engineering computing |
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante |
An Experimental Evaluation of the Effectiveness of Automatic Rule-Based Transformations for Safety-Critical Applications. (PDF / PS) |
DFT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | B. Parrotta, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
New Techniques for Accelerating Fault Injection in VHDL Descriptions. |
IOLTW |
2000 |
DBLP DOI BibTeX RDF |
VHDL, Fault Injection |
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, B. Nicolescu, Raoul Velazco |
Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. |
IOLTW |
2000 |
DBLP DOI BibTeX RDF |
Fault Injection, Software Fault-Tolerance |
| 1 | Marcello Lajolo, Luciano Lavagno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Automatic test bench generation for simulation-based validation. |
CODES |
2000 |
DBLP DOI BibTeX RDF |
simulation-based validation, genetic algorithm |
| 1 | Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante |
SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Test Pattern Generation Under Low Power Constraints. |
EvoWorkshops |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
ALPS: A Peak Power Estimation Tool for Sequential Circuits. |
Great Lakes Symposium on VLSI |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaudengo, Massimo Violante |
Optimal Vector Selection for Low Power BIST. (PDF / PS) |
DFT |
1999 |
DBLP DOI BibTeX RDF |
Test, Low-Power, BIST |
| 1 | Maurizio Rebaudengo, Matteo Sonza Reorda, Marco Torchiano, Massimo Violante |
Soft-Error Detection through Software Fault-Tolerance Techniques. (PDF / PS) |
DFT |
1999 |
DBLP DOI BibTeX RDF |
Code Redundancy, Fault Detection, Fault Injection, Soft Errors, Software Fault-Tolerance |
| 1 | Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante |
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante |
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG. |
Asian Test Symposium |
1997 |
DBLP DOI BibTeX RDF |
Genetic Algorithm, ATPG |
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