Search results for "Matthew K. Farrens"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Christopher Nitta, Kevin Macdonald, Matthew K. Farrens, Venkatesh Akella	Inferring packet dependencies to improve trace based simulation of on-chip networks.	NOCS	2011	DBLP BibTeX RDF
1	Christopher Nitta, Matthew K. Farrens, Venkatesh Akella	Resilient microring resonator based photonic networks.	MICRO	2011	DBLP DOI BibTeX RDF
1	Christopher Nitta, Matthew K. Farrens, Venkatesh Akella	Addressing system-level trimming issues in on-chip nanophotonic networks.	HPCA	2011	DBLP DOI BibTeX RDF
1	Paul Vincent Mejia, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Performance Evaluation of a Multicore System with Optically Connected Memory Modules.	NOCS	2010	DBLP DOI BibTeX RDF	OC-DIMM, DWDM, Performance Evaluation, DRAM, Optics
1	Christopher Nitta, Matthew K. Farrens	Techniques for increasing effective data bandwidth.	ICCD	2008	DBLP DOI BibTeX RDF
1	Amit Hadke, Tony Benavides, Rajeevan Amirtharajah, Matthew K. Farrens, Venkatesh Akella	Design and evaluation of an optical CPU-DRAM interconnect.	ICCD	2008	DBLP DOI BibTeX RDF
1	Mark Oskin, Frederic T. Chong, Matthew K. Farrens	Using Statistical and Symbolic Simulation for Microprocessor Performance Evaluation.	J. Instruction-Level Parallelism	2002	DBLP BibTeX RDF
1	Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens	Improving Bandwidth Utilization using Eager Writeback.	J. Instruction-Level Parallelism	2001	DBLP BibTeX RDF
1	Kevin D. Rich, Matthew K. Farrens	The Decoupled-Style Prefetch Architecture (Research Note).	Euro-Par	2000	DBLP DOI BibTeX RDF
1	Kevin D. Rich, Matthew K. Farrens	Code Partitioning in Decoupled Compilers.	Euro-Par	2000	DBLP DOI BibTeX RDF
1	Mark Oskin, Frederic T. Chong, Matthew K. Farrens	HLS: combining statistical and symbolic simulation to guide microprocessor designs.	ISCA	2000	DBLP DOI BibTeX RDF
1	Hsien-Hsin S. Lee, Gary S. Tyson, Matthew K. Farrens	Eager writeback - a technique for improving bandwidth utilization.	MICRO	2000	DBLP DOI BibTeX RDF
1	Michael Haungs, Phil Sallee, Matthew K. Farrens	Branch Transition Rate: A New Metric for Improved Branch Classification Analysis.	HPCA	2000	DBLP DOI BibTeX RDF	Branch Classification, Transition Rate, Dual Path, Branch Prediction
1	Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew K. Farrens, Aneet Chopra	Exploiting ILP in Page-based Intelligent Memory. (PDF / PS)	MICRO	1999	DBLP DOI BibTeX RDF
1	Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens	Utilizing Reuse Information in Data Cache Management.	International Conference on Supercomputing	1998	DBLP DOI BibTeX RDF	effective address, multi-lateral caches, program counter
1	Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun	Managing data caches using selective cache line replacement.	International Journal of Parallel Programming	1997	DBLP DOI BibTeX RDF
1	Gary S. Tyson, Matthew K. Farrens	Evaluating the Effects of Predicated Execution on Branch Prediction.	International Journal of Parallel Programming	1996	DBLP BibTeX RDF
1	Matthew K. Farrens, Wen-mei Hwu	Guest Editors' Introduction.	International Journal of Parallel Programming	1996	DBLP BibTeX RDF
1	Matthew K. Farrens	Distributed Decentralized Computing.	ACM Comput. Surv.	1996	DBLP DOI BibTeX RDF
1	Gary S. Tyson, Matthew K. Farrens, John Matthews, Andrew R. Pleszkun	A modified approach to data cache management.	MICRO	1995	DBLP DOI BibTeX RDF
1	Gary S. Tyson, Matthew K. Farrens	Code scheduling for multiple instruction stream architectures.	International Journal of Parallel Programming	1994	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Gary S. Tyson, Andrew R. Pleszkun	A Study of Single-Chip Processor/Cache Organizations for Large Numbers of Transistors.	ISCA	1994	DBLP DOI BibTeX RDF
1	Gary S. Tyson, Matthew K. Farrens	Techniques for extracting instruction level parallelism on MIMD architectures.	MICRO	1993	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Pius Ng, Phil Nico	A comparision of superscalar and decoupled access/execute architectures.	MICRO	1993	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Arvin Park, Allison Woodruff	CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension.	IPPS	1992	DBLP BibTeX RDF
1	Gary S. Tyson, Matthew K. Farrens, Andrew R. Pleszkun	MISC: a Multiple Instruction Stream Computer.	MICRO	1992	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Arvin Park, Gary S. Tyson	Modifying VM hardware to reduce address pin requirements.	MICRO	1992	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Andrew R. Pleszkun	Implementation of the PIPE Processor.	IEEE Computer	1991	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Andrew R. Pleszkun	Strategies for Achieving Improved Processor Throughput.	ISCA	1991	DBLP DOI BibTeX RDF	CRAY-1
1	Matthew K. Farrens, Arvin Park	Dynamic Base Register Caching: A Technique for Reducing Address Bus Width.	ISCA	1991	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Brad Wetmore, Allison Woodruff	Alleviation of tree saturation in multistage interconnection networks.	SC	1991	DBLP DOI BibTeX RDF
1	Jeffrey C. Becker, Arvin Park, Matthew K. Farrens	An Analysis of the Information Content of Address Reference Streams.	MICRO	1991	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Arvin Park	Workload and Implementation Considerations for Dynamic Base Register Caching.	MICRO	1991	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Andrew R. Pleszkun	An evaluation of functional unit lengths for single-chip processors.	MICRO	1990	DBLP DOI BibTeX RDF
1	Arvin Park, Matthew K. Farrens	Address compression through base register caching.	MICRO	1990	DBLP DOI BibTeX RDF	CPU performance, microprocessor systems, locality, bandwidth
1	Matthew K. Farrens, Andrew R. Pleszkun	Improving Performance of Small On-Chip Instruction Caches.	ISCA	1989	DBLP DOI BibTeX RDF

Publications of "Matthew K. Farrens" ( http://dblp.L3S.de/Authors/Matthew_K._Farrens )