Search results for "Maurice Meijer"

Found 17 publication records. Showing 17 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Maurice Meijer, José Pineda de Gyvez	Body-Bias-Driven Design Strategy for Area- and Performance-Efficient CMOS Circuits.	IEEE Trans. VLSI Syst.	2012	DBLP DOI BibTeX RDF
1	Gerard Villar Pique, Maurice Meijer	A 350nA voltage regulator for 90nm CMOS digital circuits with Reverse-Body-Bias.	ESSCIRC	2011	DBLP DOI BibTeX RDF
1	Maurice Meijer, José Pineda de Gyvez, Ajay Kapoor	Ultra-Low-Power Digital Design with Body Biasing for Low Area and Performance-Efficient Operation.	J. Low Power Electronics	2010	DBLP DOI BibTeX RDF
1	Maurice Meijer, José Pineda de Gyvez	Body bias driven design synthesis for optimum performance per area.	ISQED	2010	DBLP DOI BibTeX RDF
1	Maurice Meijer, José Pineda de Gyvez, Ben Kup, Bert van Uden, Peter Bastiaansen, Marco Lammers, Maarten Vertregt	A forward body bias generator for digital CMOS circuits with supply voltage scaling.	ISCAS	2010	DBLP DOI BibTeX RDF
1	Josep Rius, Luis Elvira Villagra, Maurice Meijer	A Voltage-Mode Testing Method to Detect IDDQ Defects in Digital Circuits.	European Test Symposium	2009	DBLP DOI BibTeX RDF	IDDQ testing
1	Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez	Efficient testing and diagnosis of faulty power switches in SOCs.	IET Computers & Digital Techniques	2007	DBLP BibTeX RDF
1	Josep Rius, Maurice Meijer, José Pineda de Gyvez	An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.	J. Low Power Electronics	2006	DBLP DOI BibTeX RDF
1	Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez	Testing and Diagnosis of Power Switches in SOCs.	European Test Symposium	2006	DBLP DOI BibTeX RDF
1	Maurice Meijer, Rohini Krishnan, Martijn T. Bennebroek	Energy-efficient FPGA interconnect design.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
1	Josep Rius, José Pineda de Gyvez, Maurice Meijer	An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Maurice Meijer, José Pineda de Gyvez, Ralph Otten	On-chip digital power supply control for system-on-chip applications.	ISLPED	2005	DBLP DOI BibTeX RDF	low power, performance optimization, adaptive voltage scaling
1	Atul Katoch, Maurice Meijer, Sanjeev K. Jain	Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez	Glitch-free discretely programmable clock generation on chip.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez	Limits to performance spread tuning using adaptive voltage and body biasing.	ISCAS	2005	DBLP DOI BibTeX RDF
1	André K. Nieuwland, Atul Katoch, Maurice Meijer	Reducing Cross-Talk Induced Power Consumption and Delay.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez	Technology exploration for adaptive power and frequency scaling in 90nm CMOS.	ISLPED	2004	DBLP DOI BibTeX RDF	adaptive body bias, low power, CMOS, performance optimization, leakage, adaptive voltage scaling

Publications of "Maurice Meijer" ( http://dblp.L3S.de/Authors/Maurice_Meijer )